CDB5345 Cirrus Logic Inc, CDB5345 Datasheet - Page 3

• Manufacturer Part Number: CDB5345
• Description: EVALUATION BOARD FOR CS5345
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5345

• Number Of Adc's: 2
• Number Of Bits: 24
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Inputs Per Adc: 6 Single Ended
• Power (typ) @ Conditions: 400mW @ 5 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS5345
• Description/function: Audio A/D
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• For Use With/related Products: CS5345
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1780

LIST OF FIGURES
LIST OF TABLES
DS658DB1
Figure 1. CDB5345 Controls Tab.................................................................................................... 7
Figure 2. Register Maps Tab........................................................................................................... 8
Figure 3. Block Diagram................................................................................................................ 15
Figure 4. CS5345 .......................................................................................................................... 16
Figure 5. Analog Inputs ................................................................................................................. 17
Figure 6. Analog Outputs .............................................................................................................. 18
Figure 7. S/PDIF Output................................................................................................................ 19
Figure 8. Control Port.................................................................................................................... 20
Figure 9. FPGA ............................................................................................................................. 21
Figure 10. Discrete Clock Routing and Level Shifting................................................................... 22
Figure 11. Power........................................................................................................................... 23
Figure 12. Silk Screen................................................................................................................... 24
Figure 13. Topside Layer .............................................................................................................. 25
Figure 14. Bottom side Layer ........................................................................................................ 26
Table 1. MCLK Source.................................................................................................................. 11
Table 2. Subclock Source ............................................................................................................. 12
Table 3. CS8406 SDIN Source ..................................................................................................... 12
Table 4. System Connections ....................................................................................................... 13
Table 5. System Jumper Settings ................................................................................................. 14
Table 6. Revision History .............................................................................................................. 27
CDB5345
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