DS2148DK Maxim Integrated Products, DS2148DK Datasheet - Page 35

• Manufacturer Part Number: DS2148DK
• Description: KIT DESIGN LIU DS2148 3/5V T1/E1
• Manufacturer: Maxim Integrated Products

Specifications of DS2148DK

• Main Purpose: Telecom, Line Interface Units (LIUs)
• Utilized Ic / Part: DS2148
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 5-1. Received Alarm Criteria
NOTES:
1) Receive carrier loss (RCL) is also known as loss-of-signal (LOS) or Red Alarm in T1.
2) See CCR1.5 for details.
SR (06H): STATUS REGISTER
(MSB)
LUP
ALARM
SYMBOL
(real time)
(real time)
(real time)
(real time)
RUA1
RUA1
(latched)
(latched)
(latched)
(latched)
RCL
RCL
PRBSD
TOCD
LOTC
RUA1
TCLE
LDN
RCL
LUP
1
1
LDN
E1/T1
POSITION
E1
T1
E1
T1
SR.7
SR.6
SR.5
SR.4
SR.3
SR.2
SR.1
SR.0
LOTC
Less than two zeros in two
frames (512 bits)
Over a 3ms window, five or less
zeros are received
255 (or 2048)
received
(G.775)
192 (or 1544)
are received
DESCRIPTION
Loop Up Code Detected. Set when the loop up code defined in
registers RUPCD1 and RUPCD2 is being received. See Section
4
Loop Down Code Detected. Set when the loop down code
defined in registers RDNCD1 and RDNCD2 is being received.
See Section
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for 5µsec (±2µsec). Will force the LOTC pin high.
Receive Unframed All Ones. Set when an unframed all ones
code is received at RRING and RTIP. See
Receive Carrier Loss. Set when a receive carrier loss condition
exists at RRING and RTIP. See
Transmit Current Limit Exceeded. Set when the 50mA
(RMS) current limiter is activated whether the current limiter is
enabled or not.
Transmit Open Circuit Detect. Set when the device detects
that the TTIP and TRING outputs are open circuited.
PRBS Detect. Set when the receive-side detects a 2
a 2
RUA1
for details.
20
SET CRITERIA
-1 (T1) Pseudo Random Bit Sequence (PRBS).
35 of 73
2
2
consecutive zeros
consecutive zeros
4
for details.
RCL
TCLE
More than two zeros in two
frames (512 bits)
Over a 3ms window, six or more
zeros are received
In 255 bit times, at least 32 ones
are received
14 or more ones out of 112
possible bit positions are
received starting with the first
one received
Table 5-1
CLEAR CRITERIA
TOCD
for details.
Table 5-1
15
for details.
-1 (E1) or
PRBSD
(LSB)