SI5023-EVB Silicon Laboratories Inc, SI5023-EVB Datasheet - Page 19

• Manufacturer Part Number: SI5023-EVB
• Description: BOARD EVALUATION FOR SI5023
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5023-EVB

• Main Purpose: Timing, Clock and Data Recovery (CDR)
• Utilized Ic / Part: SI5023
• Processor To Be Evaluated: Si5023
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1134

4.17. Voltage Regulator
The Si5023 regulates 2.5 V internally down from the external 3.3 V supply. Consumption is typically 170 mA. The
Si5023 may accept control inputs as high as 3.6 V.
4.18. Differential Input Circuitry
The Si5023 provides differential inputs for both the high-speed data (DIN) and the reference clock (REFCLK)
inputs. Example terminations for these inputs are shown in Figures 16, 17, 18, and 19. In applications where direct
dc coupling is possible, the 0.1 μF capacitors may be omitted. (LOS operation is only guaranteed when ac
coupled.) The data input limiting amplifier requires an input signal with a differential peak-to-peak voltage as
specified in Table 2 on page 7 to ensure a BER of at least 10
voltage requirement is specified in Table 2.
Clock source
TIA
Figure 16. Input Termination for REFCLK (ac coupled)
Figure 17. Input Termination for DIN (ac coupled)
0.1 μF
0.1 μF
0.1 μF
0.1 μF
Zo = 50 Ω
Zo = 50 Ω
Zo = 50 Ω
Zo = 50 Ω
100 Ω
Rev. 1.3
DIN +,
DIN –,
RFCLK +
RFCLK –
50 Ω
50 Ω
2.5 kΩ
10 kΩ
–12
. The REFCLK input differential peak-to-peak
2.5 V (±5%)
GND
2.5 kΩ
10 kΩ
2.5 V (±5%)
GND
5 kΩ
7.5 kΩ
Si5023
19