STEVAL-IPE008V1 STMicroelectronics, STEVAL-IPE008V1 Datasheet - Page 37

BOARD EVAL STPM01/STR715FR0

STEVAL-IPE008V1

Manufacturer Part Number
STEVAL-IPE008V1
Description
BOARD EVAL STPM01/STR715FR0
Manufacturer
STMicroelectronics
Type
Other Power Managementr
Datasheets

Specifications of STEVAL-IPE008V1

Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, ARM7
Utilized Ic / Part
STPM01, STR715FR0
Primary Attributes
3-Ph Energy Meter (or Single Phase)
Secondary Attributes
Measures Active, Reactive, Apparent Power
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
STPM01, STR715FR0
Other names
497-6412
STEVAL-IPE008V1
STPM01
Table 16.
1. IMPORTANT: This bit represents the MSB of the decimal value indicated in the description column.
8.20
110000
110001 49
110010
110011 51
110100
110101
110110
110111
binary
6-bit
Address
DEC
48
50
52
53
54
55
(1)
(1)
Configuration bits map (continued)
As it is indicated above, the STPM01 includes 56 CFG bits. Normally, some of these bits
should be permanently set during production of application of STPM01 in order to protect
the application from power fails. Of course, if an application would include an on-board
microcontroller, it could reload the configuration and calibration values after power on restart
and so, the permanent set of STPM01 would not be necessary. But this is not very safe way
to do it, because due to some EMI even imposed to tamper the meter, the microcontroller
may become lost and during such state, it can change some system signals in the STPM01
or somebody can change the calibration and configuration by changing the software of on-
board microcontroller.
Mode signals
The STPM01 includes 8 mode signals located in the DFP data record, 3 of these are used
only for internal testing purposes while 5 are useful to change some of the operation of the
STPM01. The mode signals are not retained when the STPM01 supply is not available and
then they are cleared when a POR occurs but they are not cleared when a remote reset
command (RRR) is sent through SPI.
The mode signals bit can be written using the normal writing procedure of the SPI interface
(see SPI section).
Of course, we can clear the RD by clearing all system signals. The first way is to generate
POR signal but this way we clear and reset the whole device. An alternative way is to set the
TSTD bit in the shadow latches. This setting becomes effective after SCS goes to idle state
when the TSTD clears all system signals including itself but, it does not reset the whole
device.
ADDG
Name
NOM
CRIT
CRC
LVS
n. of
bits
2
2
1
1
1
1
2-bit unsigned data for calibration of RC oscillator.
CRC=0, or CRC=3 cal=0%
CRC=1, cal=+10%;
CRC=2, cal=-10%.
2-bit modifier of nominal voltage for Single Wire Meter.
NOM=0: K
NOM=3: K
Selection of additional gain on current channels:
ADDG=0: Gain+=0 / ADDG=1: Gain+=8
Selection of tamper threshold:
CRIT =0: 12,5% / CRIT =1: 6,25%
Type of stepper selection:
LVS=0: pulse width 31.25 ms, 5V, / LVS=1: pulse width, 156.25 ms, 3V
Reserved
NOM
NOM
Doc ID 10853 Rev 7
=0.3594 / NOM=1: K
=0.4531;
Description
NOM
=0.3906 / NOM=2: K
(1)
Theory of operation
NOM
=0.4219 /
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