ISD-ES511 Nuvoton Technology Corporation of America, ISD-ES511 Datasheet - Page 17
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ISD-ES511
Manufacturer Part Number
ISD-ES511
Description
EVALUATION SYSTEM FOR ISD5100
Manufacturer
Nuvoton Technology Corporation of America
Series
ChipCorder®r
Datasheet
1.ISD5116SY.pdf
(90 pages)
Specifications of ISD-ES511
Main Purpose
Audio, Voice Record/Playback
Utilized Ic / Part
ISD5102, ISD5104, ISD5108, ISD5116
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
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- Download datasheet (674Kb)
Register Bits
The register load may be used to modify a command
sequence (such as load an address) or used with the null
command sequence to load a configuration or test
register. Not all registers are accessible to the user. [RG2
is always 0 as the four additional combinations are
undefined.]
OpCode Command Description
The following commands are used to access the chip through the I
Play: analog play command
Record: analog record command
Message Cue: analog message cue command
Read: digital read command
Write: digital write command
Erase: digital page and block erase command
Power up: global power up/down bit. (C7)
Load CFG0: load configuration register 0
Load CFG1: load configuration register 1
Read STATUS: Read the interrupt status and address register, including a hardwired device ID
6.3.3
Opcode Summary
- 17 -
RG2
C2
0
0
0
0
Publication Release Date: Oct 31, 2008
2
C interface.
RG1
C1
ISD5100 SERIES
0
0
1
1
RG0
C0
0
1
0
1
Function
No action
Reserved
Load CFG0
Load CFG1
Revision 1.42
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