AD9520-4/PCBZ Analog Devices Inc, AD9520-4/PCBZ Datasheet - Page 79

• Manufacturer Part Number: AD9520-4/PCBZ
• Description: BOARD EVAL FOR AD9520-4
• Manufacturer: Analog Devices Inc

Specifications of AD9520-4/PCBZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9520-4
• Primary Attributes: 1.4 ~ 1.8 GHz Output Frequency
• Secondary Attributes: Accepts CMOS, LVDS, or LVPECL References Up to 250 MHz
• Silicon Manufacturer: Analog Devices
• Application Sub Type: PLL Clock Synthesizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9520-0, AD9520-2, AD9520-2
• Silicon Family Name: AD9520-X
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reg.
Addr
(Hex) Bit(s) Name
19B
Reg.
Addr
(Hex) Bit(s) Name
1E0
1E1
1E1
1E1
1E1
1E1
Table 56. VCO Divider and CLK Input
[2:0] VCO divider
[4]
[3]
[2]
[1]
[0]
[0]
Power-down clock input section Powers down the clock input section (including CLK buffer, VCO divider, and CLK tree).
Power-down VCO clock interface Powers down the interface block between VCO and clock distribution.
Power-down VCO and CLK
Select VCO or CLK
Bypass VCO divider
Disable Divider 3 DCC
Description
Duty-cycle correction function.
[0] = 0; enable duty-cycle correction (default).
[0] = 1; disable duty-cycle correction.
Description
[2]
0
0
0
0
1
1
1
1
[4] = 0; normal operation (default).
[4] = 1; power down.
[3] = 0; normal operation (default).
[3] = 1; power down.
Powers down both VCO and CLK input.
[2] = 0; normal operation (default).
[2] = 1; power down.
Selects either the VCO or the CLK as the input to VCO divider.
[1] = 0; select external CLK as input to VCO divider (default).
[1] = 1; select VCO as input to VCO divider; cannot bypass VCO divider when this is
selected. This bit must be set to use the PLL with the internal VCO.
Bypasses or uses the VCO divider.
[0] = 0; use VCO divider (default).
[0] = 1; bypass VCO divider; cannot select VCO as input when this is selected.
Rev. 0 | Page 79 of 84
[1]
0
0
1
1
0
0
1
1
[0]
0
1
0
1
0
1
0
1
Divide
2 (default)
3
4
5
6
Output static
1 (bypass)
Output static
AD9520-4