MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 24
MCP1631RD-MCC1
Manufacturer Part Number
MCP1631RD-MCC1
Description
REFERENCE DESIGN FOR MCP1631HV
Manufacturer
Microchip Technology
Type
Battery Managementr
Datasheets
1.MCP1631VHVT-330EST.pdf
(34 pages)
2.MCP1631HV-330EST.pdf
(54 pages)
3.MCP1631RD-MCC2.pdf
(20 pages)
4.MCP1631RD-MCC2.pdf
(328 pages)
5.MCP1631RD-MCC1.pdf
(28 pages)
Specifications of MCP1631RD-MCC1
Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP1631HV, PIC16F883
Primary Attributes
1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
Secondary Attributes
Status LEDs
Supported Devices
MCP1631HV, PIC16F883 Device Type
Tool / Board Applications
Power Management-Battery Management
Development Tool Type
Reference Design
Input Voltage
5.5 V to 16 V
Product
Power Management Modules
Mcu Supported Families
MCP1631HV/PIC16F883 Family
Silicon Manufacturer
Microchip
Silicon Core Number
MCP1631HV
Kit Application Type
Reference Design
Application Sub Type
Battery Charger
Kit Contents
Board Only
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MCP1631HV, PIC16F883
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCP1631VHVT-330EST PDF datasheet
- MCP1631HV-330EST PDF datasheet #2
- MCP1631RD-MCC2 PDF datasheet #3
- MCP1631RD-MCC2 PDF datasheet #4
- MCP1631RD-MCC1 PDF datasheet #5
- Current page: 24 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
2.2
The data memory (see Figures 2-2 and
partitioned into four banks which contain the General
Purpose Registers (GPR) and the Special Function
Registers (SFR). The Special Function Registers are
located in the first 32 locations of each bank. The
General Purpose Registers, implemented as static RAM,
are located in the last 96 locations of each Bank.
Register locations F0h-FFh in Bank 1, 170h-17Fh in
Bank 2 and 1F0h-1FFh in Bank 3, point to addresses
70h-7Fh in Bank 0. The actual number of General
Purpose Resisters (GPR) implemented in each Bank
depends on the device. Details are shown in Figures 2-5
and 2-6. All other RAM is unimplemented and returns ‘0’
when read. RP<1:0> of the STATUS register are the
bank select bits:
RP1 RP0
2.2.1
The register file is organized as 128 x 8 in the
PIC16F882, 256 x 8 in the PIC16F883/PIC16F884, and
368 x 8 in the PIC16F886/PIC16F887. Each register is
accessed, either directly or indirectly, through the File
Select Register (FSR) (see Section 2.4 “Indirect
Addressing, INDF and FSR Registers”).
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
DS41291F-page 22
0
0
1
1
0
1
0
1
Data Memory Organization
→Bank 0 is selected
→Bank 1 is selected
→Bank 2 is selected
→Bank 3 is selected
GENERAL PURPOSE REGISTER
FILE
SPECIAL FUNCTION REGISTERS
2-3) is
© 2009 Microchip Technology Inc.
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