MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 223

• Manufacturer Part Number: MCP1631RD-MCC1
• Description: REFERENCE DESIGN FOR MCP1631HV
• Manufacturer: Microchip Technology
• Type: Battery Managementr

Specifications of MCP1631RD-MCC1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: MCP1631HV, PIC16F883
• Primary Attributes: 1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
• Secondary Attributes: Status LEDs
• Supported Devices: MCP1631HV, PIC16F883 Device Type
• Tool / Board Applications: Power Management-Battery Management
• Development Tool Type: Reference Design
• Input Voltage: 5.5 V to 16 V
• Product: Power Management Modules
• Mcu Supported Families: MCP1631HV/PIC16F883 Family
• Silicon Manufacturer: Microchip
• Silicon Core Number: MCP1631HV
• Kit Application Type: Reference Design
• Application Sub Type: Battery Charger
• Kit Contents: Board Only
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MCP1631HV, PIC16F883
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.3.2
An overflow (FFh → 00h) in the TMR0 register will set
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 “Timer0 Module” for operation of
the Timer0 module.
FIGURE 14-7:
© 2009 Microchip Technology Inc.
IOC-RB0
IOC-RB1
IOC-RB2
IOC-RB3
IOC-RB4
IOC-RB5
IOC-RB6
IOC-RB7
IOCB0
IOCB1
IOCB2
IOCB3
IOCB4
IOCB5
IOCB6
IOCB7
TIMER0 INTERRUPT
INTERRUPT LOGIC
ULPWUIF
ULPWUIE
TMR2IE
TMR1IF
TMR1IE
TMR2IF
CCP1IF
CCP1IE
CCP2IF
CCP2IE
BCLIF
BCLIE
OSFIF
OSFIE
SSPIF
SSPIE
RCIE
RCIF
ADIF
ADIE
TXIF
TXIE
C1IF
C1IE
C2IF
C2IE
EEIF
EEIE
PIC16F882/883/884/886/887
14.3.3
An input change on PORTB change sets the RBIF
(INTCON<0>)
enabled/disabled
(INTCON<3>) bit. Plus, individual pins can be
configured through the IOCB register.
Note:
Note 1:
RBIE
INTF
INTE
RBIF
PEIE
T0IF
T0IE
GIE
PORTB INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF inter-
rupt
Section 3.4.3 “Interrupt-on-Change” for
more information.
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See Section 14.6.1
“Wake-up from Sleep”.
bit.
flag
by
Wake-up (If in Sleep mode)
The
may
setting/clearing
not
interrupt
DS41291F-page 221
Interrupt to CPU
get
the
set.
can
(1)
RBIE
See
be