CP2400DK Silicon Laboratories Inc, CP2400DK Datasheet - Page 65
CP2400DK
Manufacturer Part Number
CP2400DK
Description
KIT EVAL SPI LCD DRIVER CP2400
Manufacturer
Silicon Laboratories Inc
Specifications of CP2400DK
Main Purpose
LCD Development
Embedded
Yes
Utilized Ic / Part
CP2400
Primary Attributes
I²C, SMBus Interfaces
Secondary Attributes
Up to 128 segments
Product
Microcontroller Modules
Core Processor
C8051F930
Clock Speed
20 MHz
Interface Type
SPI
Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Cpu Core
C8051F930
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1858
336-1858
336-1858
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CP2400/1/2/3
10.4. Registers for Accessing and Configuring Port I/O
All Port I/O are accessed and configured through registers. When writing to a Port, the value written to the PnOUT
register is latched to maintain the output data value at each pin. When reading, the logic levels of the Port's input
pins are returned in the PnIN. If the PnOUT register is read, the value returned will be the value of the output latch,
not the logic level of the port pad. The PnIN register is read only.
The Port input mode of the I/O pins is defined using the Port Input Mode registers (PnMDI). Each Port cell can be
configured for analog or digital I/O. The output driver characteristics of the digital I/O pins are defined using the Port
Output Mode registers (PnMDO). Each Port Output driver can be configured as either open drain or push-pull. To
configure a pin as a digital input, configure it as an open drain output and write 1 to its port latch.
The drive strength of the output drivers are controlled by the Port Drive Strength (PnDRIVE) registers. The default
is low drive strength. See Table 3.2 on page 13 for the difference in output drive strength between the two modes.
Rev. 1.0
65
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