PBMCUSLK Freescale Semiconductor, PBMCUSLK Datasheet - Page 13
![PROJECT BOARD FOR MCU](/photos/39/51/395119/4616468_sml.jpg)
PBMCUSLK
Manufacturer Part Number
PBMCUSLK
Description
PROJECT BOARD FOR MCU
Manufacturer
Freescale Semiconductor
Datasheet
1.PBMCUSLK.pdf
(30 pages)
Specifications of PBMCUSLK
Module/board Type
Student Learning Kit
Silicon Manufacturer
Freescale
Core Architecture
HCS08, S12
Core Sub-architecture
HCS08, S12
Silicon Core Number
MC9S08, MC9S12
Silicon Family Name
S08QG, S12D
Rohs Compliant
Yes
For Use With/related Products
HC(S)12(X), HC(S)08, DSP, and ColdFire modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
USB Speed
The communications speed over the USB bus is controlled by the J301 (USB_SPEED) header
illustrated in figure 4. When shipped from the factory, the board is configured for high-speed
operation.
communication speed may be reduced by setting this option jumper to Full. Slowing the
communications rate often resolves any problem encountered.
Figure 4: USB_SPEED Option Header
BDM Voltage
The integrated BDM is designed to interface with either 5V or 3.3V circuits. The VDD level
selected on the PBMCUSLK is fed back to the BDM to set output drive levels. The VDD level
is selected by VDD_SEL(JP3) option header. Further details on operating voltage selection
may be found in the POWER section above.
As noted above, total current drain from the integrated BDM must not exceed 500mA.
Excessive current drain will violate the USB 2.0 specification causing the USB bus to
shutdown.
Freescale Semiconductor
CAUTION: Do not allow total current drain to exceed 500mA when powered from the USB BDM.
HIGH
HIGH
If the user encounters a communication failure, or erratic behavior, USB
USB_SPEED
USB_SPEED
●
1
2
2
●
3
FULL
FULL
Configuration:
Selects USB High-speed communications
Selects USB Full-speed communications
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