HW-FMC-XM101-G Xilinx Inc, HW-FMC-XM101-G Datasheet - Page 12

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HW-FMC-XM101-G

Manufacturer Part Number
HW-FMC-XM101-G
Description
HARDWARE FMC INTERFACE CARD
Manufacturer
Xilinx Inc
Datasheet

Specifications of HW-FMC-XM101-G

Accessory Type
Interface Card
For Use With/related Products
Spartan 6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 1: XM101
12
Table 1-2: XM101 Features
Number
1
2
3
4
5
6
VITA 57.1 FMC
HPC connector
Samtec QSE
Connectors
PCA9543 IIC
Bus Switch
Silicon Labs
Si570
Programmable
XO/VCXO
SMA Clock
Connections
M24C02 2Kb IIC
EEPROM
Feature
www.xilinx.com
J1: 80 signal pairs comprised of LA[00:33],
HA[00:23] and HB[00:21], four clock pairs, and
the IIC bus SDA, SCL. The connector is mounted
on the bottom side of the card.
P1-P4: 4 Samtec QSE connectors with length-
matched signal pairs wired to the FMC HPC
connector as follows: P1 QSE0 LA[00:16], P2
QSE1 LA[17:33], P3 QSE2 HA[00:23], P4 QSE3
HB[00:21].
U4: IIC bus switch is connected to the main FMC
HPC IIC bus SDA and SCL signals. This
component can switch its input IIC bus to one of
two backside IIC bus connections. Each of the
two Si570 clock chips resides on one of these
backside IIC buses.
U1, U2: Silicon Labs Si570 IIC serial bus
programmable clock source devices with
frequency range 10 MHz - 810 MHz. U1 drives
signals CLK0_M2C_P/N; U2 drives
CLK2_M2C_P/N
SMA pair J2 and J3 are connected to
CLK1_M2C_P and N, respectively; SMA pair J4
and J5 are connected to CLK3_M2C_P and N,
respectively.
U3: IIC compatible electrically erasable
programmable memory (EEPROM) with 2 Kb
(256 bytes) of non-volatile storage.
Notes
UG538 (v1.1) September 24, 2010
FMC XM101 User Guide
Schematic
Page
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