ZUP36-24/U TDK Corporation, ZUP36-24/U Datasheet - Page 52

• Manufacturer Part Number: ZUP36-24/U
• Description: PWR SUP BENCH PROG 0-36V 864W
• Manufacturer: TDK Corporation
• Series: ZUPr
• Type: Programmabler

Specifications of ZUP36-24/U

• Load Regulation: 0.07%
• Voltage - Output: 0 ~ 36V
• Number Of Outputs: 1
• Power (watts): 864W
• Applications: Commercial
• Power Supply Type: Switching (Closed Frame)
• Voltage - Input: 85 ~ 265VAC
• Mounting Type: Chassis Mount
• 1st Output: 0 ~ 36 VDC @ 24A
• Size / Dimension: 13.78" L x 5.51" W x 4.88" H (350mm x 140mm x 124mm)
• Power (watts) - Rated: 864W
• Operating Temperature: 0°C ~ 50°C
• Efficiency: 84%
• Approvals: CE, EN, UL
• Line Regulation: 0.01%
• Power Supply Output Type: Variable
• No. Of Outputs: 1
• Output Voltage: 36V
• Output Current: 24A
• Power Rating: 864W
• Input Voltage: 85V AC To 265V AC
• Length: 350mm
• Width: 140mm
• Accuracy: 0.02% + 20 mV
• Brand/series: ZUP
• Current, Output: 24 A
• Display Type: Digital Meter
• Power, Output: 864 W
• Power, Rating: 864 W (Max.)
• Regulation, Line: 0.01% + 5 mA⁄1 mV + 0.005%
• Regulation, Load: 0.07% + 7 mA⁄2 mV + 0.005%
• Standards: UL Listed, CE Marked
• Temperature Coefficient: 30 ppm⁄°C (CV)⁄100 ppm⁄°C (CC)
• Temperature, Operating, Maximum: 50 °C
• Temperature, Operating, Minimum: 0 °C
• Voltage, Input: 85-265 VAC
• Voltage, Noise: 70 mV @ 20 MHz BW
• Voltage, Output: 36 VDC
• Voltage, Ripple: 5 mV @ 5 Hz to 1 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -
• 4th Output: -
• Lead Free Status / Rohs Status: RoHS Compliant part
• Other names: 285-1677; ZUP3624/U

2. Alarm Status Register:
The alarm status register records fault conditions occurring during power supply operation. Any set bit
in this register causes the ‘alarm’ bit in the operational status register to be set. Reading the register
does not change it’s content. The register is cleared by :DCL; command.
Table 5-6: Alarm status register content.
Notes: (*1) Since at each AC turn off the AC fail bit is generated and stored, it is recommended to
3. Error Codes Register:
The error codes register records errors that occurred during the programming of the power supply. Any
set bit in this register causes the ‘prog’ bit in the alarm status register to be set. Reading the register
does not change it’s content. The register is cleared by :DCL; command.
Table 5-7: Error codes register content.
5.5.4.2 Status control commands
Bit Name
ovp
otp
a/c fail
fold
prog
Bit Name
not used
wrong command
buffer overflow
wrong voltage
wrong current
2
#
1
Commands
:ALM?;
:STA?;
(*2) FOLD bit is automatically reset upon cancellation of FOLD protection.
(*3) OVP, OTP and ‘prog’ bits reset at AC turn-off or by :DCL; command.
send a :DCL; command following application of AC voltage to the power supply, to clear the
alarm status register.
In case the OTP or OVP is triggered, the front panel control is disabled until the AC input is
recycled by turning the AC ON/OFF switch to OFF and after approx. 10 sec. to ON.
Bit No
1
2
3
4
5
Bit No
1
2
3
4
5
‘1’ - Indicates that the over-voltage protection was tripped
‘1’ - Indicates that the over-temperature protection was tripped
‘1’ - Indicates that a failure occurred at the input voltage supply
‘1’ - Indicates that the foldback protection was activated
‘1’ - Indicates a programming error has occurred
Meaning
Reads the alarm status register content.
Returns the string AL followed by ASCII characters representing the
register’s content.
Refer to table 5-6 for the register content description.
example- AL00000
Reads the operational status register content.
Returns the string
register’s content.
Refer to table 5-5 for the register content description.
example- OS00010000
Description
‘1’ - Indicates that an unknown string was received
‘1’ - Indicates an overflow in the communication buffer
‘1’ - Indicates an attempt to program the power supply to a voltage
out of specification limits.
‘1’ - Indicates an attempt to program the power supply to a current
out of specification limits.
Meaning
OS
followed by ASCII characters representing the
(*3)
(*3)
(*1)
(*2)
(*3)