LTM4603HVEV#PBF Linear Technology, LTM4603HVEV#PBF Datasheet - Page 8

IC DC/DC UMODULE 6A 118-LGA

LTM4603HVEV#PBF

Manufacturer Part Number
LTM4603HVEV#PBF
Description
IC DC/DC UMODULE 6A 118-LGA
Manufacturer
Linear Technology
Series
µModuler
Type
Point of Load (POL) Non-Isolatedr
Datasheet

Specifications of LTM4603HVEV#PBF

Design Resources
LTM4603HV Spice Model
Output
0.6 ~ 5 V
Number Of Outputs
1
Power (watts)
30W
Mounting Type
Surface Mount
Voltage - Input
4.5 ~ 28 V
Package / Case
118-LGA
1st Output
0.6 ~ 5 VDC @ 6A
Size / Dimension
0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
Power (watts) - Rated
30W
Operating Temperature
-40°C ~ 85°C
Efficiency
93%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-
2nd Output
-

Available stocks

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Manufacturer
Quantity
Price
Company:
Part Number:
LTM4603HVEV#PBF
Manufacturer:
Linear Technology
Quantity:
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LTM4603HVEV#PBF
Manufacturer:
LT
Quantity:
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SI PLIFIED
LTM4603HV
MARG0 (Pin C12): This pin is the LSB logic input for the
margining function. Together with the MARG1 pin will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See Applications Information.
MARG1 (Pin D12): This pin is the MSB logic input for the
margining function. Together with the MARG0 pin will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See Applications Information.
SGND (Pin H12): Signal Ground. This pin connects to
PGND at output capacitor point.
COMP (Pin A11): Current Control Threshold and Error
Amplifi er Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
PI FU CTIO S
8
W
U
U
C
19.1k
<0.9V = OFF
SS
MAX = 5V
>2V = ON
R
FB
BLOCK DIAGRA
U
TRACK/SS
V
OUT_LCL
PGOOD
MARG1
MARG0
INTV
MPGM
DRV
COMP
SGND
PLLIN
RUN
f
V
SET
CC
CC
FB
(See Package Description for Pin Assignment)
INTERNAL
COMP
33.2k
Figure 1. Simplifi ed LTM4603HV Block Diagram
4.7μF
60.4k
W
50k
POWER CONTROL
1M
50k
50k
V
OUT
5.1V
ZENER
ranges from 0V to 2.4V with 0.7V corresponding to zero
sense voltage (zero current).
PGOOD (Pin G12): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within ±10% of the regulation point,
after a 25μs power bad mask timer expires.
RUN (Pin A10): Run Control Pin. A voltage above 1.9V
will turn on the module, and when below 1.9V, will turn
off the module. A programmable UVLO function can be
accomplished with a resistor from V
a 5.1V zener to ground. Maximum pin voltage is 5V.
V
bypass the remote sense amplifi er, or DIFFV
to this pin when remote sense amplifi er is used.
OUT_LCL
10k
(Pin L12): V
INTV
CC
+
Q1
Q2
10k
10k
22μF
OUT
1.5μF
10k
connects directly to this pin to
PGND
V
V
DIFFV
C
+
OSNS
OSNS
OUT
4603HV F01
OUT
+
+
C
IN
V
4.5V TO 28V
V
2.5V
6A
IN
IN
OUT
to this pin that has
OUT
connects
4603hvf

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