LTM4603HVEV#PBF Linear Technology, LTM4603HVEV#PBF Datasheet - Page 13

• Manufacturer Part Number: LTM4603HVEV#PBF
• Description: IC DC/DC UMODULE 6A 118-LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM4603HVEV#PBF

• Design Resources: LTM4603HV Spice Model
• Output: 0.6 ~ 5 V
• Number Of Outputs: 1
• Power (watts): 30W
• Mounting Type: Surface Mount
• Voltage - Input: 4.5 ~ 28 V
• Package / Case: 118-LGA
• 1st Output: 0.6 ~ 5 VDC @ 6A
• Size / Dimension: 0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
• Power (watts) - Rated: 30W
• Operating Temperature: -40°C ~ 85°C
• Efficiency: 93%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -

APPLICATIO S I FOR ATIO
the ramp of the internal reference and the output voltage.
The total soft-start time can be calculated as:
When the RUN pin falls below 1.5V, then the TRACK/SS
pin is reset to allow for proper soft-start control when
the regulator is enabled again. Current foldback and force
continuous mode are disabled during the soft-start pro-
cess. The soft-start function can also be used to control
the output ramp up time, so that another regulator can
be easily tracked to it.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK/SS pin. The output can be tracked up and
down with another regulator. The master regulator’s output
is divided down with an external resistor divider that is the
same as the slave regulator’s feedback divider. Figure 5
shows an example of coincident tracking. Ratiometric
modes of tracking can be achieved by selecting different
resistor values to change the output tracking ratio. The
master output must be greater than the slave output for
the tracking to work. Figure 6 shows the coincident output
tracking characteristics.
V
C
IN
IN
t
SOFTSTART
100k
PGOOD
MPGM
RUN
COMP
INTV
DRV
=
CC
CC
SGND
0 8
V
IN
.
U
LTM4603HV
V
PLLIN
PGND
• .
(
0 6
Figure 5
U
TRACK/SS
V V
f
V
DIFFV
SET
–
TRACK CONTROL
OUT_LCL
MARG0
MARG1
V
V
OSNS
OSNS
V
OUT
OUT
V
OUT MARGIN
FB
+
–
W
(
60.4k FROM
V
OUT
4603HV F05
TO V
R
40.2k
SET
FB
)
MASTER
OUTPUT
)
•
U
SLAVE OUTPUT
C
1 5
R2
60.4k
R1
40.2k
OUT
C
.
SS
µ
A A
Run Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V zener to ground. The pin can be
driven with a logic input not to exceed 5V.
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
COMP Pin
This pin is the external compensation pin. The module
has already been internally compensated for most output
voltages. Table 2 is provided for most application require-
ments. A spice model will be provided for other control
loop optimization.
PLLIN
The power module has a phase-locked loop comprised of an
internal voltage controlled oscillator and a phase detector.
This allows the internal top MOSFET turn-on to be locked
V
UVLO
VOLTAGE
OUTPUT
=
R
+ 1 2
R
2
R
• .
1 5
V
Figure 6
TIME
MASTER OUTPUT
SLAVE OUTPUT
LTM4603HV
4603HV F06
13
4603hvf