AFBR-5803Z Avago Technologies US Inc., AFBR-5803Z Datasheet - Page 6

• Manufacturer Part Number: AFBR-5803Z
• Description: TXRX OPT 1X9 100MBPS DUPLEX SC
• Manufacturer: Avago Technologies US Inc.

Specifications of AFBR-5803Z

• Data Rate: 100Mbps
• Wavelength: 1300nm
• Applications: General Purpose
• Voltage - Supply: 3.3V, 5V
• Connector Type: SC
• Mounting Type: Through Hole
• Function: Implement FDDI and ATM at the 100 Mbps/125 MBd rate
• Product: Transceiver
• Pulse Width Distortion: 0.69 ns (Max)/2.14 ns (Max)
• Maximum Output Current: 50 mA
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: Multimode Glass
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1991

Figure 6. Bit Error Rate vs. Relative Receiver Input Optical Power.
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.
R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
Figure 7. Recommended Decoupling and Termination Circuits

TERMINATION
AT PHY
DEVICE
INPUTS
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
1 x 10
CONDITIONS:
1. 155 MBd
2. PRBS 2
3. CENTER OF SYMBOL SAMPLING
4. T
5. V
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
-10
-11
-12
-2
-3
-4
-5
-6
-7
-8
-9
A
CC
NO INTERNAL CONNECTION
-6
= +25˚C
= 3.3 V to 5 V dc
V
Rx
R6
RELATIVE INPUT OPTICAL POWER - dB
EE
1
7
-1
RD
-4
R5
RD
2
V
CC
C6
RD
R7
RD
-2
3
R8
AFBR-5803 SERIES
Rx
CENTER OF SYMBOL
SD
SD
4
0
AFBR-5803Z
TOP VIEW
R10
R9
C1
TRANSCEIVER
V
AT V
C3
Rx
V
CC
5
CC
L1
V
FILTER
CC
2
CC
PINS
NO INTERNAL CONNECTION
V
Tx
CC
6
C4
L2
Tx
C2
4
TD
7
TD
TERMINATION
AT TRANSCEIVER
INPUTS
R1
TD
R2
8
V
CC
V
Tx
C5
EE
R3
9
R4
TD
Transceiver Jitter Performance
TheAvago Technologies­ 1300 nm trans­ceivers­ are
des­igned to operate per the s­ys­tem jitter allocations­
s­tated in Tables­ E1 of Annexes­ E of the FDDI PMD and
LCF-PMD s­tandards­.
The Avago Technologies­1300 nm trans­mitters­ will
tolerate the wors­t cas­e input electrical jitter allowed in
thes­e tables­ without violating the wors­t cas­e output jitter
requirements­ of Sections­ 8.1 Active Output Interface of
the FDDI PMD and LCF-PMD s­tandards­.
The Avago Technologies­ 1300 nm receivers­ will tolerate
the wors­t cas­e input optical jitter allowed in Sections­ 8.2
Active Input Interface of the FDDI PMD and LCF-PMD
s­tandards­ without violating the wors­t cas­e output electri-
cal jitter allowed in the Tables­ E1 of the Annexes­ E.
The jitter s­pecifications­ s­tated in the following 1300 nm
trans­ceiver s­pecification tables­ are derived from the
values­ in Tables­ E1 of Annexes­ E. They repres­ent the wors­t
cas­e jitter contribution that the trans­ceivers­ are allowed
to make to the overall s­ys­tem jitter without violating the
Annex E allocation example. In practice the typical con-
tribution of the Avago Technologies­ trans­ceivers­ is­ well
below thes­e maximum allowed amounts­.
Recommended Handling Precautions
Avago Technologies­ recommends­ that normal s­tatic pre-
cautions­ be taken in the handling and as­s­embly of thes­e
trans­ceivers­ to prevent damage which may be induced
by electros­tatic dis­charge (ESD). The AFBR-5800 s­eries­ of
trans­ceivers­ meet MIL-STD-883C Method 3015.4 Clas­s­ 2
products­.
Care s­hould be us­ed to avoid s­horting the receiver data
or s­ignal detect outputs­ directly to ground without
proper current limiting impedance.