NHD-0440AZ-FSW-FBW Newhaven Display, NHD-0440AZ-FSW-FBW Datasheet - Page 9

• Manufacturer Part Number: NHD-0440AZ-FSW-FBW
• Description: LCD MOD CHAR 4X40 WH TRANSFL
• Manufacturer: Newhaven Display
• Series: NHD-0440AZ-Fr

Specifications of NHD-0440AZ-FSW-FBW

• Display Type: FSTN - Film Super-Twisted Nematic
• Display Mode: Transflective
• Number Of Digits/alpha: 160
• Outline L X W X H: 190.00mm x 54.00mm x 9.50mm
• Viewing Area: 147.00mm L x 29.50mm W
• Backlight: LED - White
• Display Format: 40 x 4
• Character Size: 4.89mm H x 2.78mm W
• Character Format: 5 x 8 Dots
• Voltage - Supply: 5.0V
• Dot Size: 0.50mm W x 0.55mm H
• Operating Temperature: -20°C ~ 70°C
• Character Count X Line: 40 x 4
• Module Size (w X H X T): 190 mm x 54 mm x 13 mm
• Fluid Type: FSTN Negative
• Voltage Rating: 5 V
• Operating Temperature Range: - 20 C to + 70 C
• Backlight Type: LED Yellow / Green
• Interface: Parallel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Clear
Display
Return
Home
Entry mode
Set
Display ON/
OFF control
Cursor or
Display shift
Function set
Set CGRAM
Address
Set DDRAM
Address
Flag and
Address
Write data to
Address
Read data
From RAM
NHD-0440AZ
After CGRAM read operation, display shift may not be executed correctly.
NOTE: In case of RAM write operation, AC is increased/decreased by 1 as in read operation.
Instruction table
NOTE: When an MPU program with checking the busy flag (DB7) is made, it must be
DDRAM address:
V: A
Instruction
Read busy
At this time, AC indicates next address position, but only the previous data can be read by the read instruction.
00
40
00
40
1
necessary 1/2fosc is necessary for executing the next instruction by the falling edge
of the “E” signal after the busy flag (DB7) goes to “Low”.
01 02 03 04
40 41 42 43
01 02 03 04
40 41 42 43
2
RS
0
0
0
0
0
0
0
0
0
1
1
3
R/
W
0
0
0
0
0
0
0
0
1
0
1
4
DB7
BF
D7
D7
0
0
0
0
0
0
0
1
5
DB6
AC6
AC6
D6
D6
0
0
0
0
0
0
1
Instruction code
-
-
-
-
-
DB5
AC5
AC5
AC5
D5
D5
0
0
0
0
0
1
-
-
-
-
-
DB4
AC4
AC4
AC4
DL
D4
D4
0
0
0
0
1
-
-
-
-
-
DB3
AC3
AC3
AC3
S/C
D3
D3
-
-
-
-
-
N
0
0
0
1
DB2
AC2
AC2
AC2
-
-
-
-
-
R/L
8/9
D2
D2
D
F
0
0
1
-
-
-
-
-
DB1
AC1
AC1
AC1
I/D
D1
D1
C
0
1
-
-
-
-
-
-
-
DB0
AC0
AC0
AC0
SH
D0
D0
B
1
-
-
-
-
-
-
-
-
Write “20H” to DDRA and set
DDRAM address to “00H”
from AC
Set DDRAM address to “00H”
From AC and return cursor to
Its original position if shifted.
The contents of DDRAM are
not changed.
Assign cursor moving direction
And blinking of entire display
Set display (D), cursor (C), and
Blinking of cursor (B) on/off
Control bit.
Set cursor moving and display
Shift control bit, and the
Direction, without changing of
DDRAM data.
Set interface data length (DL: 8-
Bit/4-bit), numbers of display
Line (N: =2-line/1-line) and,
Display font type (F: 5x11/5x8)
Set CGRAM address in address
Counter.
Set DDRAM address in address
Counter.
Whether during internal
Operation or not can be known
By reading BF. The contents of
Address counter can also be
read.
Write data into internal RAM
(DDRAM/CGRAM).
Read data from internal RAM
(DDRAM/CGRAM).
-
-
-
-
-
Description
-
-
-
-
-
36 37 38 39 40
23 24 25 26 27
63 64 65 66 67
23 24 25 26 27
63 64 65 66 67
Display position
DDRAM address
Time (fosc=
Execution
270 KHZ
01/31/2007
1.53ms
1.53ms
39us
39us
39us
39us
39us
43us
43us
0us