MT36HTS51272FY-53EA3E3 Micron Technology Inc, MT36HTS51272FY-53EA3E3 Datasheet - Page 10

• Manufacturer Part Number: MT36HTS51272FY-53EA3E3
• Description: MODULE DDR2 4GB 240FBDIMM
• Manufacturer: Micron Technology Inc

Specifications of MT36HTS51272FY-53EA3E3

• Memory Type: DDR2 SDRAM
• Memory Size: 4GB
• Speed: 533MT/s
• Package / Case: 240-FBDIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AMB Interface
Figure 3:
High-Speed, Differential, Point-to-Point Link Interfaces (1.5V)
PDF: 09005aef822148b0/source: 09005aef82214898
HTS36C512x72F_2.fm - Rev. A 4/06 EN
AMB Interface Block Diagram
Figure 3 illustrates the AMB and all of its interfaces. They consist of two FBDIMM links,
one DDR2 channel, and an SMBus interface. Each FBDIMM link connects the AMB to a
host memory controller or an adjacent FBDIMM. The DDR2 channel supports direct
connection to the DDR2 SDRAMs on an FBDIMM.
The FBDIMM channel uses a daisy-chain topology to provide expansion from a single
FBDIMM per channel to up to eight FBDIMMs per channel. The host sends data on the
southbound link to the first FBDIMM, where it is received and redriven to the second
FBDIMM. On the southbound data path, each FBDIMM receives the data and redrives
the data to the next FBDIMM, until the last FBDIMM receives the data. The last
FBDIMM in the chain initiates the transmission of northbound data in the direction of
the host. On the northbound data path, each FBDIMM receives the data and redrives the
data to the next FBDIMM until the host is reached.
Host direction
The AMB supports one FBDIMM channel consisting of two bidirectional link interfaces
using high-speed differential point-to-point electrical signaling. The southbound input
link is 10 lanes wide. It carries commands and write data from the host memory
controller, or the adjacent FBDIMM in the host direction, to the next FBDIMM in the
chain.
The northbound input link is 14 lanes wide. It carries read return data or status informa-
tion from one FBDIMM to the next in the host direction and multiplexes in any inter-
nally generated READ return data or status information.
Data and commands sent to the DDR2 SDRAM devices travel southbound on 10 primary
differential signal line pairs. Data and status information received from the DDR2
SDRAM devices travel northbound on 14 primary differential pairs. Data and commands
sent to the upstream adjacent FBDIMM are repeated and travel further southbound on
10 secondary differential pairs. Data and status information received from the upstream
adjacent FBDIMM travel further northbound on 14 secondary differential pairs.
Northbound
Southbound
Primary or
out link
in link
Memory Interface
240-Pin 4GB DDR2 SDRAM FBDIMM (DR, FB, x72)
AMB
10
DDR2
Channel
Micron Technology, Inc., reserves the right to change products or specifications without notice.
to (optional) next FBDIMM
SMBus
Secondary direction or
Northbound
Southbound
out link
in link
Functional Description
©2006 Micron Technology, Inc. All rights reserved.
Preliminary