MT9HTF12872AY-53ED1 Micron Technology Inc, MT9HTF12872AY-53ED1 Datasheet - Page 37
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MT9HTF12872AY-53ED1
Manufacturer Part Number
MT9HTF12872AY-53ED1
Description
MODULE SDRAM DDR2 1GB 240DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT9HTF12872AY-40ED1.pdf
(44 pages)
Specifications of MT9HTF12872AY-53ED1
Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
533MT/s
Package / Case
240-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
pdf: 09005aef80e6f860, source: 09005aef80e5b799
HTF9C32_64_128x72AG_2.fm - Rev. C 6/05 EN
32.
33. Value is minimum pulse width, not the number of clock registrations.
34. Applicable to Read cycles only. Write cycles generally require additional time due to
35.
36. This parameter is not referenced to a specific voltage level, but specified whwen the
37. When DQS is used single-ended, the minimum limit is reduced by 100ps.
t
number of banks already open or closed. If a single-bank PRECHARGE command is
issued,
Write recovery time (
t
clock edges. CKE must remain at the valid input level the entire time it takes to
achieve the 3 clocks of registration. Thus, after any CKE transition, CKE may not tran-
sition from its valid level during the time period of
device output is no longer driving (
RPA timing applies when the PRECHARGE(ALL) command is issued, regardless of the
CKE (MIN) of 3 clocks means CKE must be registered on three consecutive positive
256MB, 512MB, 1GB (x72, SR, ECC) 240-Pin DDR2 SDRAM UDIMM
t
RP timing applies.
t
WR) during auto precharge.
t
37
RPA(MIN) applies to all 8-bank DDR2 devices.
t
RPST) or beginning to drive (
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
IS + 2 x
©2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
t
CK +
t
t
IH.
RPRE).
Notes