MT9HTF12872AY-53ED1 Micron Technology Inc, MT9HTF12872AY-53ED1 Datasheet - Page 21
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MT9HTF12872AY-53ED1
Manufacturer Part Number
MT9HTF12872AY-53ED1
Description
MODULE SDRAM DDR2 1GB 240DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT9HTF12872AY-40ED1.pdf
(44 pages)
Specifications of MT9HTF12872AY-53ED1
Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
533MT/s
Package / Case
240-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 8:
COMMAND
Figure 9:
COMMAND
pdf: 09005aef80e6f860, source: 09005aef80e5b799
HTF9C32_64_128x72AG_2.fm - Rev. C 6/05 EN
DQS, DQS#
DQS, DQS#
CK#
DQ
CK#
CK
DQ
CK
Burst length = 4
Shown with nominal t AC, t DQSCK, and t DQSQ
Burst length = 4
ACTIVE n
ACTIVE n
T0
T0
READ Latency
Write Latency
READ n
T1
WRITE n
T1
t RCD (MIN)
additive latency (AL) and CAS Latency (CL); RL = AL + CL. Write latency (WL) is equal to
READ latency minus one clock; WL = AL + CL - 1 x
shown in Figure 8, READ Latency. An example of a WRITE latency is shown in Figure 9,
Write Latency.
t
RCD (MIN)
256MB, 512MB, 1GB (x72, SR, ECC) 240-Pin DDR2 SDRAM UDIMM
AL = 2
NOP
T2
AL = 2
NOP
T2
CAS# latency (CL) = 3
Additive latency (AL) = 2
WRITE latency = AL + CL -1 = 4
CAS# latency (CL) = 3
Additive latency (AL) = 2
READ latency (RL) = AL + CL = 5
NOP
T3
WL = AL + CL - 1 = 4
RL = 5
NOP
T3
21
NOP
T4
CL = 3
CL - 1 = 2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
T4
Posted CAS Additive Latency (AL)
NOP
T5
t
CK. An example of a READ latency is
NOP
T5
D
n
in
©2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
NOP
T6
TRANSITIONING DATA
n + 1
D
D
OUT
n
in
TRANSITIONING DATA
D
n + 1
NOP
n + 2
OUT
T6
D
in
NOP
T7
D
n + 2
OUT
n + 3
D
in
DON’T CARE
D
n + 3
OUT
DON’T CARE
NOP
T7
NOP
T8