MT8VDDT6464AY-40BF4 Micron Technology Inc, MT8VDDT6464AY-40BF4 Datasheet - Page 22

MODULE DDR SDRAM 512MB 184-DIMM

MT8VDDT6464AY-40BF4

Manufacturer Part Number
MT8VDDT6464AY-40BF4
Description
MODULE DDR SDRAM 512MB 184-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT8VDDT6464AY-40BF4

Memory Type
DDR SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1232
MT8VDDT6464AY-40BF4
Table 15:
Table 16:
PDF: 09005aef80a43556, Source: 09005aef80a43534
DDA8C16_32_64x64AG_2.fm - Rev. E 4/06 EN
Parameter/Condition
Parameter/Condition
Supply voltage
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output low voltage: I
Input leakage current: V
Output leakage current: V
Standby current: SCL = SDA = V
Power supply current: SCL clock frequency = 100 KHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
All voltages referenced to V
Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to V
Notes:
OUT
IN
= 3mA
OUT
= GND to V
1. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL = 1
2. This parameter is sampled.
3. For a reSTART condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
= GND to V
and the falling or rising edge of SDA.
sequence to the end of the EEPROM internal erase/program cycle. During the WRITE cycle,
the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resistor, and
the EEPROM does not respond to its slave address.
DD
- 0.3V; All other inputs = V
128MB, 256MB, 512MB (x64, SR): PC3200 184-Pin DDR UDIMM
DD
SS
SS
DD
; V
; V
DDSPD
DDSPD
= +2.3V to +3.6V
= +2.3V to +3.6V
22
DD
or V
t
WRC) is the time from a valid stop condition of a write
SS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
Symbol
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
t
t
t
t
HIGH
LOW
f
WRC
t
t
BUF
SCL
AA
DH
t
t
t
F
R
Symbol
I
V
DDSPD
Vih
V
I
V
I
I
I
LO
CC
SB
OL
LI
IL
V
Min
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
DDSPD
0
Min
Serial Presence-Detect
2.3
–1
× 0.7 V
Max
©2005 Micron Technology, Inc. All rights reserved.
300
400
0.9
0.3
50
10
V
DDSPD
DDSPD
Units
KHz
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
Max
3.6
0.4
10
10
30
2
+ 0.5
× 0.3
Notes
Units
1
2
2
3
4
mA
µA
µA
µA
V
V
V
V

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