SDCFJ-1024-388 SanDisk, SDCFJ-1024-388 Datasheet - Page 52

• Manufacturer Part Number: SDCFJ-1024-388
• Description: COMPACT FLASH 1GB
• Manufacturer: SanDisk
• Type: CompactFlashr

Specifications of SDCFJ-1024-388

• Memory Size: 1GB
• Memory Type: CompactFLASH
• Density: 1GByte
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Package Type: Not Required
• Mounting: Socket
• Pin Count: 50
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3.135/4.5V
• Operating Supply Voltage (max): 3.465/5.5V
• Programmable: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 7 (BUSY)
Bit 6 (RDY)
Bit 5 (DWF)
Bit 4 (DSC)
Bit 3 (DRQ)
Bit 2 (CORR)
Bit 1 (IDX)
Bit 0 (ERR)
4.5.10. Device Control Register (Address—3F6[376]; Offset Eh)
This register is used to control the CompactFlash Memory Card interrupt request and to issue an ATA soft reset to
the card. The bits are defined as follows:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2 (SW Rst)
Bit 1 (-IEn)
Bit 0
4.5.11. Card (Drive) Address Register (Address 3F7[377]; Offset Fh)
This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not
be mapped into the host's I/O space because of potential conflicts on Bit 7. The bits are defined as follows:
Bit 7
CompactFlash
D7
X
D7
X
This bit is unknown.
®
Memory Card Product Manual, Rev. 11.0 ©2006 SanDisk Corporation
The busy bit is set when the CompactFlash Memory Card has access to the command buffer and registers and
the host is locked out from accessing the command register and buffer. No other bits in this register are valid
when this bit is set to a 1.
RDY indicates whether the device is capable of performing CompactFlash Memory Card operations. This bit
is cleared at power up and remains cleared until the CompactFlash Card is ready to accept a command.
This bit, if set, indicates a write fault has occurred.
This bit is set when the CompactFlash Memory Card is ready.
The Data Request is set when the CompactFlash Memory Card requires that information be transferred either
to or from the host through the Data register.
This bit is set when a Correctable data error has been encountered and the data has been corrected. This
condition does not terminate a multi-sector read operation.
This bit is always set to 0.
This bit is set when the previous command has ended in some type of error. The bits in the Error register
contain additional information describing the error.
Implementation Note:
Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at
the same addresses as the CompactFlash Memory Card. Following are some possible solutions to this
problem for the PCMCIA implementation:
1. Locate the CompactFlash Memory Card at a non-conflicting address, i.e., Secondary address (377) or in an
independently decoded Address Space when a Floppy Disk Controller is located at the Primary addresses.
2. Do not install a Floppy and a CompactFlash Memory Card in the system at the same time.
This bit is an X (Do not care).
This bit is an X (Do not care).
This bit is an X (Do not care).
This bit is an X (Do not care).
This bit is ignored by the CompactFlash Memory Card.
This bit is set to 1 in order to force the CompactFlash Memory Card to perform an AT Disk controller Soft
Reset operation. This does not change the PCMCIA Card Configuration Registers (4.3.2 to 4.3.5) as a
hardware Reset does. The Card remains in Reset until this bit is reset to '0'.
The Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1, interrupts from the
CompactFlash Memory Card are disabled. This bit also controls the Int bit in the Configuration and Status
Register. This bit is set to 0 at power on and Reset.
This bit is ignored by the CompactFlash Memory Card.
-WTG
D6
X
D6
-HS3
D5
X
D5
-HS2
D4
X
D4
-HS1
D3
1
D3
ATA Drive Register Set Definition and Protocol
SW Rst
-HS0
D2
D2
-nDS1
-IEn
D1
D1
-nDS0
D0
D0
0
4-7