SDCFJ-1024-388 SanDisk, SDCFJ-1024-388 Datasheet - Page 24

• Manufacturer Part Number: SDCFJ-1024-388
• Description: COMPACT FLASH 1GB
• Manufacturer: SanDisk
• Type: CompactFlashr

Specifications of SDCFJ-1024-388

• Memory Size: 1GB
• Memory Type: CompactFLASH
• Density: 1GByte
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Package Type: Not Required
• Mounting: Socket
• Pin Count: 50
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3.135/4.5V
• Operating Supply Voltage (max): 3.465/5.5V
• Programmable: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CompactFlash
-IOWR
(PC Card Memory Mode)
-IOWR
(PC Card I/O Mode)
-IOWR
(True IDE Mode)
-OE
(PC Card Memory Mode)
-OE
(PC Card I/O Mode)
-ATA SEL
(True IDE Mode)
RDY/-BSY
(PC Card Memory Mode)
-IREQ
( PC Card I/O Mode)
INTRQ
(True IDE Mode)
-REG
(PC Card Memory Mode)
Attribute Memory Select
-REG
(PC Card I/O Mode)
-DMACK
(True IDE Mode)
RESET
(PC Card Memory Mode)
RESET
(PC Card I/O Mode)
-RESET
(True IDE Mode)
VCC
(PC Card Memory Mode)
Signal Name
®
Memory Card Product Manual, Rev. 11.0 ©2006 SanDisk Corporation
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Pin
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9
This signal is not used in this mode.
The I/O Write strobe pulse is used to clock I/O data on the Card Data bus into the
CompactFlash controller registers when the card is configured to use the I/O interface.
The clocking will occur on the negative to positive edge of the signal (trailing edge).
In True IDE Mode, this signal has the same function as in PC Card I/O Mode.
This is an Output Enable strobe generated by the host interface. It is used to read
data from the CompactFlash Card in Memory Mode and to read the CIS and
configuration registers.
In PC Card I/O Mode, this signal is used to read the CIS and configuration registers.
To enable True IDE Mode this input should be grounded by the host.
In Memory Mode this signal is set high when the CompactFlash Card is ready to
accept a new data transfer operation and held low when the card is busy. The Host
memory card socket must provide a pull-up resistor.
At power up and at Reset, the RDY/-BSY signal is held low (busy) until the
CompactFlash Card has completed its power up or reset function. No access of any
type should be made to the CompactFlash Card during this time. The RDY/-BSY
signal is held high (disabled from being busy) whenever the following condition is true:
The CompactFlash Card has been powered up with +RESET continuously
disconnected or asserted.
I/O Operation—After the CompactFlash Card has been configured for I/O operation,
this signal is used as -Interrupt Request. This line is strobed low to generate a pulse
mode interrupt or held low for a level mode interrupt.
In True IDE Mode, this signal is the active high Interrupt Request to the host.
This signal is used during Memory Cycles to distinguish between Common Memory
and Register (Attribute) Memory accesses. High for Common Memory, Low for
Attribute Memory.
The signal must also be active (low) during I/O Cycles when the I/O address is on the
Bus.
This signal is used by the host in response to DMARQ to initiate DMA transfers.
NOTE: This signal may be negated by the host to suspend the DMS transfer in
process. For Multiword DMA transfers, the device may negate DMARQ with the tL
specified time once the DMACK- is asserted and reasserted again at a later time to
resume DMA operation. Alternatively, if the device is able to continue the data
transfer, the device may leave DMARQ asserted and wait for the host to reassert
DMACK-.
When the pin is high, this signal resets the CompactFlash Card. The card is Reset
only at power up if this pin is left high or open from power-up. The card is also reset
when the Soft Reset bit in the Card Configuration Option Register is set.
This signal is the same as the PC Card Memory Mode signal.
In the True IDE Mode this input pin is the active low hardware reset from the host.
+5 V, +3.3 V power.
CompactFlash Memory Card Interface Description
Description
3-5