DS1922E-F5# Maxim Integrated Products, DS1922E-F5# Datasheet - Page 35

IBUTTON TEMP LOGGER 4KBit F5

DS1922E-F5#

Manufacturer Part Number
DS1922E-F5#
Description
IBUTTON TEMP LOGGER 4KBit F5
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1922E-F5#

Rohs Information
IButton RoHS Compliance Plan
Memory Size
512B
Memory Type
NVSRAM (Non-Volatile SRAM)
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
For a write-one time slot, the voltage on the data line
must have crossed the V
low time t
the voltage on the data line must stay below the V
threshold until the write-zero low time t
The voltage on the data line should not exceed V
during the entire t
threshold has been crossed, the DS1922E needs a
recovery time t
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
until the read low time t
window, when responding with a 0, the DS1922E starts
pulling the data line low; its internal timing generator
determines when this pulldown ends and the voltage
starts rising again. When responding with a 1, the
DS1922E does not hold the data line low at all, and the
voltage starts rising as soon as t
The sum of t
nal timing generator of the DS1922E on the other side
define the master sampling window (t
t
the data line. For most reliable communication, t
should be as short as permissible and the master
should read close to but no later than t
reading from the data line, the master must wait until
t
time t
slot. Note that t
single DS1922E attached to a 1-Wire line. For multiple
device configurations, t
accommodate the additional 1-Wire device input
capacitance. Alternatively, an interface that performs
active pullup during the 1-Wire recovery time such as
the DS2482-x00 or DS2480B 1-Wire line drivers can be
used.
In a 1-Wire environment line termination is possible only
during transients controlled by the bus master (1-Wire
driver). 1-Wire networks, therefore, are susceptible to
noise of various origins. Depending on the physical
size and topology of the network, reflections from end
MSRMAX
SLOT
REC
is expired. This guarantees sufficient recovery
) in which the master must perform a read from
W1LMAX
for the DS1922E to get ready for the next time
Improved Network Behavior
High-Temperature Logger iButton with 8KB
RL
REC
+ δ (rise time) on one side and the inter-
REC
(Switchpoint Hysteresis)
______________________________________________________________________________________
is expired. For a write-zero time slot,
before it is ready for the next time slot.
W0L
specified herein applies only to a
TH
or t
RL
threshold before the write-one
REC
W1L
is expired. During the t
RL
must be extended to
window. After the V
is over.
W0LMIN
Slave-to-Master
Master-to-Slave
MSRMAX
MSRMIN
is expired.
. After
ILMAX
TH
TH
RL
RL
TL
to
points and branch points can add up or cancel each
other to some extent. Such reflections are visible as
glitches or ringing on the 1-Wire communication line.
Noise coupled onto the 1-Wire line from external
sources can also result in signal glitching. A glitch dur-
ing the rising edge of a time slot can cause a slave
device to lose synchronization with the master and, as
a consequence, result in a Search ROM command
coming to a dead end or cause a device-specific func-
tion command to abort. For better performance in net-
work applications, the DS1922E uses a new 1-Wire
front-end, which makes it less sensitive to noise and
also reduces the magnitude of noise injected by the
slave device itself.
The DS1922E’s 1-Wire front-end differs from traditional
slave devices in four characteristics:
1) The falling edge of the presence pulse has a con-
2) There is additional lowpass filtering in the circuit that
3) There is a hysteresis at the low-to-high switching
4) There is a time window specified by the rising edge
Devices that have the parameters t
specified in their electrical characteristics use the
improved 1-Wire front-end.
trolled slew rate. This provides a better match to the
line impedance than a digitally switched transistor,
converting the high-frequency ringing known from
traditional devices into a smoother low-bandwidth
transition. The slew-rate control is specified by the
parameter t
dard and overdrive speed.
detects the falling edge at the beginning of a time
slot. This reduces the sensitivity to high-frequency
noise. This additional filtering does not apply at
overdrive speed.
threshold V
does not go below V
(Figure 14, Case A). The hysteresis is effective at
any 1-Wire speed.
hold-off time t
even if they extend below V
(Figure 14, Case B, t
droops or glitches that appear late after crossing the
V
cannot be filtered out and are taken as the begin-
ning of a new time slot (Figure 14, Case C, t
t
REH
TH
).
threshold and extend beyond the t
Data-Log Memory
TH
FPD
REH
. If a negative glitch crosses V
, which has different values for stan-
during which glitches are ignored,
TH
GL
- V
< t
HY
REH
, it is not recognized
TH
FPD
). Deep voltage
- V
, V
HY
HY
REH
, and t
threshold
window
TH
GL
REH
but
35

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