DS1993L-F5+ Maxim Integrated Products, DS1993L-F5+ Datasheet - Page 5

• Manufacturer Part Number: DS1993L-F5+
• Description: IBUTTON MEMORY 4KBit F5
• Manufacturer: Maxim Integrated Products
• Series: iButton®r
• Type: Memory iButtonr

Specifications of DS1993L-F5+

• Rohs Information: IButton RoHS Compliance Plan
• Memory Size: 512B
• Memory Type: NVRAM
• Maximum Operating Temperature: + 70 C
• Package / Case: F5 MicroCan
• Minimum Operating Temperature: - 40 C
• Memory Configuration: 128K X 8
• Supply Voltage Range: 2.8V To 6V
• Memory Case Style: Micro Can
• Operating Temperature Range: -40°C To +70°C
• Filter Terminals: SMD
• Memory Voltage, Vcc: 2.8V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MEMORY
The memory map in Figure 4 shows a 32-Byte page called the scratchpad, and additional 32-Byte pages
called memory. The DS1992 contains pages 0 though 3 that make up the 1024-bit SRAM. The DS1993
contain pages 0 through 15 that make up the 4096-bit SRAM.
The scratchpad is an additional page that acts as a buffer when writing to memory. Data is first written to
the scratchpad where it can be read back. After the data has been verified, a copy scratchpad command
transfers the data to memory. This process ensures data integrity when modifying the memory.
MEMORY FUNCTION COMMANDS
The Memory Function Flow Chart (Figure 6) describes the protocols necessary for accessing the memory.
An example follows the flow chart. Three address registers are provided as shown in Figure 5. The first
two registers represent a 16-bit target address (TA1, TA2). The third register is the ending offset/data
status byte (E/S).
The target address points to a unique Byte location in memory. The first 5 bits of the target address
(T4:T0) represent the Byte offset within a page. This Byte offset points to one of 32 possible Byte
locations within a given page. For instance, 00000b points to the first Byte of a page where as 11111b
would point to the last Byte of a page.
The third register (E/S) is a read only register. The first 5 bits (E4: E0) of this register are called the
ending offset. The ending offset is a Byte offset within a page (1 of 32 Bytes). Bit 5 (PF) is the partial
Byte flag. Bit 6 (OF) is the overflow flag. Bit 7 (AA) is the authorization accepted flag.
Figure 5. ADDRESS REGISTERS
TARGET ADDRESS (TA1)
TARGET ADDRESS (TA2)
ENDING ADDRESS WITH
DATA STATUS (E/S)
(READ ONLY)
Write Scratchpad Command [0Fh]
After issuing the write scratchpad command, the user must first provide the 2-Byte target address,
followed by the data to be written to the scratchpad. The data is written to the scratchpad starting at the
byte offset (T4:T0). The ending offset (E4:E0) is the Byte offset at which the host stops writing data. The
maximum ending offset is 11111b (31d). If the host attempts to write data past this maximum offset, the
overflow flag (OF) is set and the remaining data is ignored. If the user writes an incomplete Byte and an
overflow has not occurred, the partial Byte flag (PF) is set.
Read Scratchpad Command [AAh]
This command can be used to verify scratchpad data and target address. After issuing the read scratchpad
command, the user can begin reading. The first two Bytes are the target address. The next Byte is the
ending offset/data status Byte (E/S) followed by the scratchpad data beginning at the Byte offset (T4: T0).
The user can read data until the end of the scratchpad, after which the data read is all logic 1’s.
T15
AA
T7
7
T14
OF
T6
6
T13
T5
PF
5
5 of 17
T12
T4
E4
4
T11
T3
E3
3
T10
T2
E2
2
T1
T9
E1
1
T0
T8
E0
0