DS1993L-F5+ Maxim Integrated Products, DS1993L-F5+ Datasheet - Page 2

IBUTTON MEMORY 4KBit F5

DS1993L-F5+

Manufacturer Part Number
DS1993L-F5+
Description
IBUTTON MEMORY 4KBit F5
Manufacturer
Maxim Integrated Products
Series
iButton®r
Type
Memory iButtonr
Datasheet

Specifications of DS1993L-F5+

Rohs Information
IButton RoHS Compliance Plan
Memory Size
512B
Memory Type
NVRAM
Maximum Operating Temperature
+ 70 C
Package / Case
F5 MicroCan
Minimum Operating Temperature
- 40 C
Memory Configuration
128K X 8
Supply Voltage Range
2.8V To 6V
Memory Case Style
Micro Can
Operating Temperature Range
-40°C To +70°C
Filter Terminals
SMD
Memory Voltage, Vcc
2.8V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS1992/DS1993
iButton DESCRIPTION
The DS1992/DS1993 memory iButtons (hereafter referred to as DS199_) are rugged read/write data
carriers that act as a localized database, easily accessible with minimal hardware. The nonvolatile
memory and optional timekeeping capability offer a simple solution to storing and retrieving vital
information pertaining to the object to which the iButton is attached. Data is transferred serially through
the 1-Wire protocol that requires only a single data lead and a ground return.
The scratchpad is an additional page that acts as a buffer when writing to memory. Data is first written to
the scratchpad where it can be read back. After the data has been verified, a copy scratchpad command
transfers the data to memory. This process ensures data integrity when modifying the memory. A 48-bit
serial number is factory lasered into each DS199_ to provide a guaranteed unique identity that allows for
absolute traceability. The durable MicroCan package is highly resistant to environmental hazards such as
dirt, moisture, and shock. Its compact coin-shaped profile is self-aligning with mating receptacles,
allowing the DS199_ to be easily used by human operators. Accessories permit the DS199_ to be
mounted on almost any surface including plastic key fobs, photo-ID badges, and PC boards.
Applications include access control, work-in-progress tracking, electronic travelers, storage of calibration
constants, and debit tokens.
OPERATION
The DS199_ have three main data components: 1) 64-bit lasered ROM, 2) 256-bit scratchpad, and 3)
1024-bit (DS1992) or 4096-bit (DS1993) SRAM. All data is read and written least significant bit first.
The memory functions are not available until the ROM function protocol has been established. This
protocol is described in the ROM functions flow chart (Figure 9). The master must first provide one of
four ROM function commands: 1) read ROM, 2) match ROM, 3) search ROM, or 4) skip ROM. After a
ROM function sequence has been successfully executed, the memory functions are accessible and the
master can then provide any one of the four memory function commands (Figure 6).
PARASITE POWER
The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry steals power whenever
the data input is high. The data line provides sufficient power as long as the specified timing and voltage
requirements are met. The advantages of parasite power are two-fold: 1) by parasiting off this input,
battery power is not consumed for 1-Wire ROM function commands, and 2) if the battery is exhausted for
any reason, the ROM may still be read normally. The remaining circuitry of the DS1992 and DS1993 is
solely operated by battery energy.
64-BIT LASERED ROM
Each DS199_ contain a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code.
The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits (see Figure 2).
The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates
8
5
4
as shown in Figure 3. The polynomial is X
+ X
+ X
+ 1. Additional information about the Maxim
1-Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards. The shift
register bits are initialized to zero. Then starting with the least significant bit of the family code, 1 bit at a
time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered.
After the 48th bit of the serial number has been entered, the shift register contains the CRC value.
Shifting in the 8 bits of CRC should return the shift register to all zeros.
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