SLE 4418 M2.2 Infineon Technologies, SLE 4418 M2.2 Datasheet - Page 7

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SLE 4418 M2.2

Manufacturer Part Number
SLE 4418 M2.2
Description
IC EEPROM 1KBYTE M2.2 PKG
Manufacturer
Infineon Technologies
Datasheet

Specifications of SLE 4418 M2.2

Applications
*
Package / Case
M2.2 Chip Card Module
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Mounting Type
-
Other names
SLE4418M2.2
SP000060239
1
1.1
The chip contains an EEPROM organized 1024 x 8 bit offering the possibility of programmable write
protection for each byte. Reading of the whole memory is always possible. The memory can be
written and erased byte by byte. Input data and the contents of the adressed byte are compared so
that only bits are written which were not written before. Erasing is only possible byte-wise, even if
only one bit is to be erased, but bits may be written individually. Each byte can be write/erase-
protected individually by setting a protect bit (EEPROM
programmable and cannot be erased.
1.2
Additionally to the above functions this version has a PSC verification logic. All the memory, except
for the PSC, can always be read. The memory can be written or erased only after PSC verification.
The error counter can always be written. After eight successive incorrect entries the error counter
will block any subsequent attempt at PSC verification and hence any possibility to write and erase.
2
2.1
When the operating voltage is applied, the chip goes into the power-on reset (POR) state. POR is
terminated by reset. Reset is started by RST changing from “0” to “1” and finished by CLK going
from “0” to “1”. This reset operation aborts any currently active command. After POR a read
operation must be performed before any change of data is possible.
2.2
Answer to reset sets the address counter to “0” and the first data bit appears on the output. The
contents of the following addresses can be read out with the following clock pulses. Answer to reset
is executed by the following steps (Fig. 2) :
3
The state of RST defines the data direction on I/O.
RST
1
0
Semiconductor Group
– RST goes from “0” to “1”,
– clock pulse is applied,
– RST changes back from “1” to “0”.
Functional Description
SLE 4418
SLE 4428
Reset and Answer-to-Reset
Reset
Answer to Reset (ISO 7816)
Commands
I/O
Command entry
Data output
4
ROM). The protect bit is only one time
SLE 4418
SLE 4428

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