SLE 4418 M2.2 Infineon Technologies, SLE 4418 M2.2 Datasheet - Page 10

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SLE 4418 M2.2

Manufacturer Part Number
SLE 4418 M2.2
Description
IC EEPROM 1KBYTE M2.2 PKG
Manufacturer
Infineon Technologies
Datasheet

Specifications of SLE 4418 M2.2

Applications
*
Package / Case
M2.2 Chip Card Module
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Mounting Type
-
Other names
SLE4418M2.2
SP000060239
3.1
Write/Erase Data Byte without Protect Bit
Remark: Erase means “0”
There are three kinds of write/erase operations which are automatically executed by the chip:
Write/Erase Data Byte with Protect Bit
The protect bit is erased at delivery, it can be written only once. Write procedure see above.
Write Protect Bit with Data Comparison
The data has to be entered a second time. The protect bit is only written if the old and the new data
are identical.
The execution of write/erase commands are terminated internally after a given number of clock
cycles. The end of the operation is indicated by the transition from “1” to “0” on I/O. Only RST
transition from “0” to “1” sets I/O to state “1”.
Figure 5
Programming: Erase and Write
Semiconductor Group
– Erase and subsequent write (duration 203 clock pulses, f
– Write only: This procedure is suitable if single bits of one byte shall be changed only from “1”
– Erase only (= FF; duration 103 clock pulses, f
to “0”. (duration 103 clock pulses, f
Write/Erase Operations
“1”, write means “1”
20 kHz) (Fig.6)
7
“0”.
20 kHz) (Fig.6).
20 kHz) (Fig.5)
SLE 4418
SLE 4428

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