KS8842-16MQL Micrel Inc, KS8842-16MQL Datasheet - Page 109
![IC SWITCH 10/100 16BIT 128PQFP](/photos/6/81/68152/576-128-pqfp_sml.jpg)
KS8842-16MQL
Manufacturer Part Number
KS8842-16MQL
Description
IC SWITCH 10/100 16BIT 128PQFP
Manufacturer
Micrel Inc
Specifications of KS8842-16MQL
Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
KS8842-PMQL-EVAL - EVAL KIT EXPERIMENTAL KS8842KS8842-16MQL-EVAL - EVAL KIT EXPERIMENTAL KS8842
Lead Free Status / RoHS Status
Not Compliant, Lead free / RoHS Compliant
Other names
576-1458
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Bank 50 Port 2 Control Register 1 (0x00): P2CR1
This register contains the global per port control for the switch function. See description in P1CR1, Bank 48 (0x00)
Bank 50 Port 2 Control Register 2 (0x02): P2CR2
This register contains the global per port control for the switch function. See description in P1CR2, Bank 48 (0x02)
Bank 50 Port 2 VID Control Register (0x04): P2VIDCR
This register contains the global per port control for the switch function. See description in P1VIDCR, Bank 48 (0x04)
Bank 50 Port 2 Control Register 3 (0x06): P2CR3
This register contains the global per port control for the switch function. See description in P1CR3, Bank 48 (0x06)
Bank 50 Port 2 Ingress Rate Control Register (0x08): P2IRCR
This register contains per port ingress rate control. See description in P1IRCR, Bank 48 (0x08)
Bank 50 Port 2 Egress Rate Control Register (0x0A): P2ERCR
This register contains per port egress rate control. See description in P1ERCR, Bank 48 (0x0A)
Micrel, Inc.
Bit
6
5
4
3
2
1
0
October 2007
Default
0
0
0
0
0
0
0
R/W
RO
RO
RO
RO
RO
RO
RO
Description
AN Done
1 = AN done.
0 = AN not done.
Link Good
1 = link good.
0 = link not good.
Partner flow control capability.
1 = link partner flow control (pause) capable.
0 = link partner not flow control (pause) capable.
Partner 100BT full-duplex capability.
1 = link partner 100BT full-duplex capable.
0 = link partner not 100BT full-duplex capable.
Partner 100BT half-duplex capability.
1 = link partner 100BT half-duplex capable.
0= link partner not 100BT half-duplex capable.
Partner 10BT full-duplex capability.
1= link partner 10BT full-duplex capable.
0 = link partner not 10BT full-duplex capable.
Partner 10BT half-duplex capability.
1 = link partner 10BT half-duplex capable.
0 = link partner not 10BT half-duplex capable.
109
Bit is same as:
Bank 45 0x02 bit 5
Bank 45 0x02 bit 2
Bank 45 0x0A bit 10
Bank 45 0x0A bit 8
Bank 45 0x0A bit 7
Bank 45 0x0A bit 6
Bank 45 0x0A bit 5
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9