LTC1436AIGN Linear Technology, LTC1436AIGN Datasheet - Page 10

• Manufacturer Part Number: LTC1436AIGN
• Description: IC SW REG SYNC STEP-DOWN 24-SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1436AIGN

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 1.19 ~ 9 V
• Current - Output: 50mA
• Frequency - Switching: 125kHz ~ 240kHz
• Voltage - Input: 3.5 ~ 30 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

LTC1436A
LTC1436-PLL-A/LTC1437A
OPERATIO
Main Control Loop
The LTC1436A/LTC1437A use a constant frequency, cur-
rent mode step-down architecture. During normal opera-
tion, the top MOSFET is turned on each cycle when the
oscillator sets the RS latch and turned off when the main
current comparator I1 resets the RS latch. The peak
inductor current at which I1 resets the RS latch is con-
trolled by the voltage on I
amplifier EA. V
Functions, allow EA to receive an output feedback voltage
V
the load current increases, it causes a slight decrease in
V
I
matches the new load current. While the top MOSFET is off,
the bottom MOSFET is turned on until either the inductor
current starts to reverse, as indicated by current compara-
tor I2, or the beginning of the next cycle.
The top MOSFET drivers are biased from floating boot-
strap capacitor C
each off cycle. However, when V
close to V
turn on the top MOSFET continuously. The dropout detec-
tor counts the number of oscillator cycles that the top
MOSFET remains on, and periodically forces a brief off
period to allow C
The main control loop is shut down by pulling RUN/SS pin
low. Releasing RUN/SS allows an internal 3µA current
source to charge soft start capacitor C
reaches 1.3V, the main control loop is enabled with the I
voltage clamped at approximately 30% of its maximum
value. As C
leased allowing normal operation to resume.
Comparator OV guards against transient overshoots
> 7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.
Low Current Operation
Adaptive Power mode allows the LTC1436A/LTC1437A to
automatically change between two output stages sized for
different load currents. TGL and BG pins drive large
synchronous N-channel MOSFETs for operation at high
currents, while the TGS pin drives a much smaller
10
TH
FB
FB
voltage to increase until the average inductor current
from either internal or external resistive dividers. When
relative to the 1.19V reference, which in turn causes the
OUT
SS
, the loop may enter dropout and attempt to
PRGM
continues to charge, I
B
B
U
, which normally is recharged during
to recharge.
and V
(Refer to Functional Diagram)
TH
OSENSE
pin, which is the output of error
IN
pins, described in the Pin
decreases to a voltage
TH
is gradually re-
SS
. When C
SS
TH
N-channel MOSFET used in conjunction with a Schottky
diode for operation at low currents. This allows the loop to
continue to operate at normal frequency as the load
current decreases without incurring the large MOSFET
gate charge losses. If the TGS pin is left open, the loop
defaults to Burst Mode operation in which the large
MOSFETs operate intermittently based on load demand.
Adaptive Power mode provides constant frequency opera-
tion down to approximately 1% of rated load current. This
results in an order of magnitude reduction of load current
before Burst Mode operation commences. Without the
small MOSFET (i.e.: no Adaptive Power mode), the transi-
tion to Burst Mode operation is approximately 10% of
rated load current.
The transition to low current operation begins when com-
parator I2 detects current reversal and turns off the
bottom MOSFET. If the voltage across R
exceed the hysteresis of I2 (approximately 20mV) for one
full cycle, then on following cycles the top drive is routed to
the small MOSFET at TGS pin and BG pin is disabled. This
continues until an inductor current peak exceeds 20mV/
R
causes drive to be returned to TGL pin on the next cycle.
Two conditions can force continuous synchronous opera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE
the other is when the SFB pin is below 1.19V. The latter
condition is used to assist in secondary winding regulation
as described in the Applications Information section.
Frequency Synchronization
A Phase-locked loop (PLL) is available on the
LTC1436A-PLL and LTC1437A to allow the oscillator to be
synchronized to an external source connected to the
PLLIN pin. The output of the phase detector at the PLL LPF
pin is also the control input of the oscillator, which
operates over a 0V to 2.4V range corresponding to – 30%
to 30% in frequency. When locked, the PLL aligns the turn-
on of the top MOSFET to the rising edge of the synchroniz-
ing signal. When PLLIN is left open or at a constant DC
voltage, PLL LPF goes low, forcing the oscillator to mini-
mum frequency.
SENSE
or the I
TH
voltage exceeds 0.6V, either of which
+
and SENSE
–
pins is below 1.4V and
SENSE
does not
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