LTC1709EG#TRPBF Linear Technology, LTC1709EG#TRPBF Datasheet - Page 24

• Manufacturer Part Number: LTC1709EG#TRPBF
• Description: IC SW REG STEP-DOWN SYNC 36-SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1709EG#TRPBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 1.3 ~ 3.5 V
• Current - Output: 3A
• Voltage - Input: 4 ~ 36 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Frequency - Switching: -

LTC1709
APPLICATIO S I FOR ATIO
3) Are the SENSE
minimum PC trace spacing? The filter capacitors between
SENSE
possible to the LTC1709. Ensure accurate current sensing
with Kelvin connections at the current sense resistor.
4) Does the (+) plate of C
topside MOSFETs and the (–) plate of C
the bottom MOSFETS as closely as possible? This capaci-
tor provides the AC current to the MOSFETs. Keep the
input current path formed by the input capacitor, top and
bottom MOSFETs, and the Schottky diode on the same
side of the PC board in a tight loop to minimize conducted
and radiated EMI.
5) Is the INTV
nected closely between INTV
capacitor carries the MOSFET driver peak currents. A
small value is recommended to allow placement immedi-
ately adjacent to the IC.
6) Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the LTC1709.
7) Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
The diagram in Figure 10 illustrates all branch currents in
a 2-phase switching regulator. It becomes very clear after
studying the current waveforms why it is critical to keep
the high-switching-current paths to a small physical size.
High electric and magnetic fields will radiate from these
“loops” just as radio stations transmit signals. The output
capacitor ground should return to the negative terminal of
the input capacitor and not share a common ground path
with any switched current paths. The left half of the circuit
gives rise to the “noise” generated by a switching regula-
tor. The ground terminations of the sychronous MOSFETs
and Schottky diodes should return to the negative plate(s)
of the input capacitor(s) with a short isolated PC trace
since very high switched currents are present. A separate
isolated path from the negative plate(s) of the input
capacitor(s) should be used to tie in the IC power ground
pin (PGND) and the signal ground pin (SGND). This
technique keeps inherent signals generated by high cur-
rent pulses from taking alternate current paths that have
24
+
and SENSE
CC
–
1 F ceramic decoupling capacitor con-
and SENSE
U
–
pin pairs should be as close as
IN
U
connect to the drains of the
CC
+
leads routed together with
and the PGND pin? This
W
IN
to the sources of
U
finite impedances during the total period of the switching
regulator. External OPTI-LOOP compensation allows over-
compensation for PC layouts which are not optimized but
this is not the recommended design procedure.
Simplified Visual Explanation of How a 2-Phase
Controller Reduces Both Input and Output RMS Ripple
Current
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output
capacitors. The effective input and output ripple frequency
is multiplied up by the number of phases used. Figure 11
graphically illustrates the principle.
The worst-case RMS ripple current for a single stage
design peaks at an input voltage of twice the output
voltage. The worst-case RMS ripple current for a two stage
design results in peak outputs of 1/4 and 3/4 of input
voltage. When the RMS current is calculated, higher
effective duty factor results and the peak current levels are
divided as long as the currents in each stage are balanced.
Refer to Application Note 77 for a detailed description of
how to calculate RMS current for the multiphase switching
regulator. Figures 3 and 4 help to illustrate how the input
and output currents are reduced by using an additional
phase. The input current peaks drop in half and the
frequency is doubled for this 2-phase converter. The input
capacity requirement is thus reduced theoretically by a
factor of four! Ceramic input capacitors with their
unbeatably low ESR characteristics can be used.
Figure 4 illustrates the RMS input current drawn from the
input capacitance vs the duty cycle as determined by the
ratio of input and output voltage. The peak input RMS
current level of the single phase system is reduced by 50%
in a 2-phase solution due to the current splitting between
the two stages.
An interesting result of the 2-phase solution is that the V
which produces worst-case ripple current for the input
capacitor, V
duces zero input current ripple in the 2-phase design.
OUT
= V
IN
/2, in the single phase design pro-
IN