LTC1709EG Linear Technology, LTC1709EG Datasheet

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... Current foldback limits MOSFET dissipaton during short-circuit conditions when overcurrent latchoff is disabled. OPTI-LOOP compensation allows the transient response to be optimized for a wide range of output capacitors and ESR values. , LTC and LT are registered trademarks of Linear Technology Corporation. OPTI-LOOP is a trademark of Linear Technology Corporation 35V Q1 ...

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... Sink/Source 5 A; (Note 1.2V Ext Load); (Note (Note 5) EXTV Tied OUT OUT RUN/ 1.9V RUN/SS V Rising RUN/ TOP VIEW ORDER PART NUMBER TG1 LTC1709EG 3 34 SW1 4 33 BOOST BG1 7 30 EXTV INTV PGND 10 27 BG2 11 26 BOOST 2 12 SW2 25 13 TG2 24 ...

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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER V RUN/SS Pin Latchoff Arming RUN/SSLO I RUN/SS Discharge Current SCL I Shutdown Latch Disable Current SDLHO I Total Sense Pins Source Current SENSE DF Maximum Duty Factor MAX ...

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... Slew Rate Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1709EG is guaranteed to meet performance specifications from Specifications over the – operating temperature range are assured by design, characterization and correlation with statistical process controls. ...

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W U TYPICAL PERFOR A CE CHARACTERISTICS Supply Current vs Input Voltage and Mode 1000 800 600 ON 400 200 SHUTDOWN INPUT VOLTAGE (V) 1709 G04 Internal 5V LDO Line Reg ...

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LTC1709 W U TYPICAL PERFOR A CE CHARACTERISTICS Load Regulation 0.0 FCB = 15V IN FIGURE 1 –0.1 –0.2 –0.3 –0 LOAD CURRENT (A) 1709 G13 Maximum Current Sense Threshold vs Temperature ...

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W U TYPICAL PERFOR A CE CHARACTERISTICS Oscillator Frequency vs Temperature 350 FREQSET 300 250 V = OPEN FREQSET 200 150 FREQSET 100 50 0 – 100 – ...

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LTC1709 CTIO S AMPMD (Pin 23): This Logic Input pin controls the connections of internal precision resistors that configure the operational amplifier as a unity-gain differential amplifier. TG2, TG1 (Pins 24, 35): High Current Gate ...

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CTIO AL DIAGRA PLLIN PHASE DET F IN 50k PLLFLTR R LP CLK1 C LP OSCILLATOR CLK2 TO SECOND CHANNEL – – AMPMD 0V POSITION DIFFOUT V 0.8V REF V ...

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LTC1709 U OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC1709 uses a constant frequency, current mode step-down architecture with inherent current sharing. During normal operation, the top MOSFET is turned on each cycle when the oscillator sets the ...

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... This capacitor is charged by a fixed current plus an additional current which is proportional to the voltage applied to the PLLFLTR pin. Refer to Phase-Locked Loop and Frequency Synchronization in the Applications Infor- mation section for additional information. PolyPhase is a registered trademark of Linear Technology Corporation. LTC1709 and an input common SENSE ). The current com- ...

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LTC1709 U U APPLICATIO S I FOR ATIO A graph for the voltage applied to the PLLFLTR pin vs frequency is given in Figure 2. As the operating frequency is increased the gate charge losses will be higher, reducing efficiency ...

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U U APPLICATIO S I FOR ATIO but it is very dependent on inductance selected. As induc- tance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have ...

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LTC1709 U U APPLICATIO S I FOR ATIO of the bottom MOSFET from turning on, storing charge during the dead-time, and requiring a reverse recovery period which would reduce efficiency Schottky (depending on output current) diode ...

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U U APPLICATIO S I FOR ATIO output capacitor types. OPTI-LOOP compensation effec- tively removes constraints on output capacitor ESR. The impedance characteristics of each capacitor type are sig- nificantly different than an ideal capacitor and therefore require accurate modeling ...

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LTC1709 U U APPLICATIO S I FOR ATIO external voltage source is applied to the EXTV the V supply is not present, a diode can be placed in IN series with the LTC1709’s V pin and a Schottky diode IN ...

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U U APPLICATIO S I FOR ATIO mon, tightly coupled pair of PC traces. The differential amplifier corrects for DC drops in both the power and ground paths. The differential amplifier output signal is divided down and compared with the ...

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LTC1709 U U APPLICATIO S I FOR ATIO floated or connected get a digital high input. The BIAS series diode is used to prevent the digital inputs from being damaged or clamped if they are driven higher ...

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U U APPLICATIO S I FOR ATIO Figure 6, eliminates any extra supply current during shut- down while eliminating the INTV CC ing controller start-up. Why should you defeat current latchoff? During the prototyping stage of a design, there may ...

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LTC1709 U U APPLICATIO S I FOR ATIO applications may approach this minimum on-time limit and care should be taken to ensure that: V OUT t ON MIN the duty cycle falls below what can be ...

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U U APPLICATIO S I FOR ATIO and output power level. The combined effects of increas- ingly lower output voltages and higher currents required by high performance digital systems is not doubling but quadrupling the importance of loss terms in ...

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LTC1709 U U APPLICATIO S I FOR ATIO the bandwidth of the feedback loop, so this signal cannot be used to determine phase margin. This is why it is better to look at the Ith pin signal which is in ...

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U U APPLICATIO S I FOR ATIO The power dissipation on the topside MOSFET can be easily estimated. Using a Siliconix Si4420DY for example 0.013 , C = 300pF. At maximum input DS(ON) RSS voltage with T (estimated) ...

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LTC1709 U U APPLICATIO S I FOR ATIO – Are the SENSE and SENSE leads routed together with minimum PC trace spacing? The filter capacitors between + – SENSE and SENSE pin pairs should be as close as ...

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U U APPLICATIO S I FOR ATIO The output ripple current is reduced significantly when compared to the single phase solution using the same inductance value because the V OUT term from the stage that has its bottom MOSFET on ...

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LTC1709 U U APPLICATIO S I FOR ATIO CIN I COUT SINGLE PHASE SW1 V SW2 CIN I COUT Figure 11. Single and 2-Phase Current Waveforms DUAL PHASE ...

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... FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...

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... VID and Power Good Indication LTC1735 High Efficiency Synchronous Step-Down Controller LTC1736 High Efficiency Synchronous Step-Down Controller with 5-Bit VID Adaptive Power and Burst Mode are trademarks of Linear Technology Corporation. Linear Technology Corporation 28 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear-tech.com ...