LTC3736EGN-1#PBF Linear Technology, LTC3736EGN-1#PBF Datasheet - Page 20

• Manufacturer Part Number: LTC3736EGN-1#PBF
• Description: IC CTRLR SW SYNC DUAL 2PH 24SSOP
• Manufacturer: Linear Technology
• Series: PolyPhase®r
• Type: Step-Down (Buck)r

Specifications of LTC3736EGN-1#PBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.6 ~ 9.8 V
• Current - Output: 1A
• Frequency - Switching: 450kHz ~ 580kHz
• Voltage - Input: 2.75 ~ 9.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
change as the supply is reduced down to 2.4V. Also shown
is the effect on V
Minimum On-Time Considerations
Minimum on-time, t
in which the LTC3736-1 is capable of turning the top
P-channel MOSFET on and then off. It is determined by
internal timing delays and the gate charge required to turn
on the top MOSFET. Low duty cycle and high frequency
applications may approach the minimum on-time limit
and care should be taken to ensure that:
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LTC3736-1 will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple current and ripple voltage will increase. The
minimum on-time for the LTC3736-1 is typically about
250ns. However, as the peak sense voltage (I
R
creases up to about 300ns.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, five main sources usually account for most of the
losses in LTC3736-1 circuits: 1) LTC3736-1 DC bias
current, 2) MOSFET gate charge current, 3) I
and 4) transition losses.
1) The V
LTC3736-1
20
DS(ON)
the electrical characteristics, excluding MOSFET driver
currents. V
creases with V
t
ON MIN
(
) decreases, the minimum on-time gradually in-
Efficiency = 100% – (L1 + L2 + L3 + …)
IN
)
(pin) current is the DC supply current, given in
<
IN
f
OSC
V
REF
current results in a small loss that in-
IN
OUT
•
.
U
ON(MIN)
.
V
IN
U
, is the smallest amount of time
W
U
2
R losses,
L(PEAK)
•
2) MOSFET gate charge current results from switching the
3) I
4) Transition losses apply to the top external P-channel
Other losses, including C
losses and inductor core losses, generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to (∆I
resistance of
charge C
regulator loop then returns V
During this recovery time, V
shoot or ringing. OPTI-LOOP compensation allows the
transient response to be optimized over a wide range of
output capacitance and ESR values.
The I
the dominant pole-zero loop compensation. The I
nal components shown in the Typical Application on the
front page of this data sheet will provide an adequate
starting point for most applications. The values can be
gate capacitance of the power MOSFETs. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from SENSE
The resulting dQ/dt is a current out of SENSE
typically much larger than the DC supply current. In
continuous mode, I
MOSFETs and inductor. In continuous mode, the aver-
age output current flows through L but is “chopped”
between the top P-channel MOSFET and the bottom
N-channel MOSFET. The MOSFET R
by duty cycle can be summed with the resistance of L
to obtain I
MOSFET and increase with higher operating frequen-
cies and input voltages. Transition losses can be esti-
mated from:
Transition Loss = 2 (V
2
R losses are calculated from the DC resistances of the
TH
series R
OUT
LOAD
, which generates a feedback error signal. The
2
COUT
R losses.
C
)(ESR), where ESR is the effective series
-C
. ∆I
C
OUT
filter (see Functional Diagram) sets
LOAD
GATECHG
immediately shifts by an amount
IN
IN
)
OUT
also begins to charge or dis-
2
I
OUT
O(MAX)
and C
can be monitored for over-
= f • Q
to its steady-state value.
C
OUT
P
RSS
.
DS(ON)
ESR dissipative
(f)
+
s multiplied
to ground.
+
, which is
TH
exter-
37361f