LTC1877EMS8#TR Linear Technology, LTC1877EMS8#TR Datasheet - Page 11

• Manufacturer Part Number: LTC1877EMS8#TR
• Description: IC BUCK SYNC ADJ .6A 8MSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1877EMS8#TR

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 10 V
• Current - Output: 600mA
• Frequency - Switching: 550kHz
• Voltage - Input: 2.65 ~ 10 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIONS INFORMATION
this stable operating point the phase comparator output
is high impedance and the fi lter capacitor C
voltage.
The loop fi lter components C
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The fi lter
component’s C
acquires lock. Typically R
to 0.01μF . When not synchronized to an external clock,
the internal connection to the V
disallows setting the internal oscillator frequency by a DC
voltage on the V
Effi ciency Considerations
The effi ciency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the effi ciency and which change would produce
the most improvement. Effi ciency can be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses in LTC1877 circuits: V
I
effi ciency loss at very low load currents, whereas the
I
load currents. In a typical effi ciency plot, the effi ciency
curve at very low load currents can be misleading since
the actual power lost is of no consequence, as illustrated
in Figure 6.
1. The V
2
2
R losses. The V
R loss dominates the effi ciency loss at medium to high
Effi ciency = 100% – (L1 + L2 + L3 + ...)
the DC bias current as given in the Electrical Charac-
teristics section and the internal main switch and syn-
chronous switch gate charge currents. The gate charge
current results from switching the gate capacitance
of the internal power MOSFET switches. Each time
the gate is switched from high to low to high again, a
packet of charge dQ moves from V
resulting dQ/dt is the current out of V
larger than the DC bias current. In continuous mode,
IN
quiescent current is due to two components:
LP
PLL LPF
IN
and R
quiescent current loss dominates the
pin.
LP
LP
determine how fast the loop
LP
= 10k and C
CO
and R
IN
quiescent current and
is disconnected. This
LP
IN
IN
smooth out the
to ground. The
that is typically
LP
LP
is 2200pF
holds the
2. I
Other losses including C
ses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC1877 does not dissipate much
heat due to its high effi ciency. But, in applications where the
LTC1877 is running at high ambient temperature with low
supply voltage and high duty cycles, such as in dropout,
the heat dissipated may exceed the maximum junction
I
charges of the internal top and bottom switches. Both
the DC bias and gate charge losses are proportional
to V
at higher supply voltages.
internal switches, R
continuous mode, the average output current fl ow-
ing through inductor L is chopped between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(DC) as follows:
The R
be obtained from the Typical Performance Character-
istics curves. Thus, to obtain I
R
average output current.
2
GATECHG
R losses are calculated from the resistances of the
SW
R
SW
IN
to R
DS(ON)
0.00001
and thus their effects will be more pronounced
0.0001
= (R
0.001
0.01
L
0.1
= f(Q
Figure 6. Power Lost vs Load Current
1
and multiply the result by the square of the
DS(ON)TOP
for both the top and bottom MOSFETs can
V
L = 10μH
Burst Mode OPERATION
IN
T
0.1
= 4.2V
+ Q
V
V
V
OUT
OUT
OUT
1
LOAD CURRENT (mA)
B
SW
= 1.5V
= 2.5V
= 3.3V
) where Q
)(DC) + (R
IN
, and external inductor R
and C
10
DS(ON)
OUT
2
T
DS(ON)BOT)
R losses, simply add
100
and Q
ESR dissipative los-
and the duty cycle
LTC1877
B
1877 F06
1000
are the gate
(1 – DC)
11
L
1877fa
. In