ADP3209DJCPZ-RL ON Semiconductor, ADP3209DJCPZ-RL Datasheet - Page 19

• Manufacturer Part Number: ADP3209DJCPZ-RL
• Description: IC CTLR BUCK 5BIT 1PH 32LFCSP
• Manufacturer: ON Semiconductor

Specifications of ADP3209DJCPZ-RL

• Applications: Controller, Power Supplies for Next-Generation Intel Processors
• Voltage - Input: 3.3 ~ 22 V
• Number Of Outputs: 1
• Voltage - Output: 0.4 ~ 1.25 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Output Voltage: 1.174 V
• Output Current: 15 A
• Input Voltage: 19 V
• Supply Current: 5 mA
• Switching Frequency: 390 KHz
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Inductor DCR Temperature Correction
copper wire is the source of the DCR, the temperature
changes associated with the inductor’s winding must be
compensated for. Fortunately, copper has a well−known
temperature coefficient (TC) of 0.39%/°C.
percentage of change in resistance, it cancels the
temperature variation of the inductor’s DCR. Due to the
nonlinear nature of NTC thermistors, series resistors R
and R
produce the desired temperature coefficient tracking.
R
given R
r
Figure 25. Temperature−Compensation Circuit Values
CS2
CS1
If the DCR of the inductor is used as a sense element and
If R
The following procedure and expressions yield values for
1. Select an NTC to be used based on its type and
2. Find the relative resistance value of the NTC at
3. Find the relative value of R
4. Compute the relative values for r
, R
(A * B)
+
CS2
ADP3209
CS
value. Because the value needed is not yet
determined, start with a thermistor with a value
close to R
of better than 5%.
two temperatures. The appropriate temperatures
will depend on the type of NTC, but 50°C and
90°C have been shown to work well for most
types of NTCs. The resistance values are called A
(A is R
R
value of the NTC is always 1 at 25°C.
the two temperatures. The relative value of R
based on the percentage of change needed, which
is initially assumed to be 0.39%/°C in this
example. The relative values are called r
1/(1+ TC × (T
(T
T
by using the following equations:
CS
CS2
TH
2
(see Figure 25) are needed to linearize the NTC and
A
2
is 90°C.
value.
is designed to have an opposite but equal
− 25))), where TC is 0.0039, T
, and R
(90°C)/R
CSCOMP
TO INDUCTOR OR LOW-SIDE MOSFET
CSREF
(1 * B)
CSFB
TH
PLACE AS CLOSE AS POSSIBLE
r
1
(50°C)/R
CS
10
12
11
TH
C
r
2
CS1
and an NTC with an initial tolerance
TH
1
* A
(the thermistor value at 25°C) for a
(25°C)). Note that the relative
− 25))) and r
r
1
* B
TH
C
AS POSSIBLE AND AWAY FROM
(1 * B)
CS2
(25°C)) and B (B is
KEEP THIS PATH AS SHORT
R
SWITCH NODE LINES
(1 * A)
R
CS1
TH
CS
2
(r
r
required for each of
R
2
R
CS2
2
SWITCH
) B
PH
NODE
CS1
is 1/(1 + TC ×
TO
r
1
2
is 50°C, and
, r
* (A * B)
CS2
(1 * A)
V
SENSE
1
CCGFX
TO
, and r
(r
1
http://onsemi.com
CS
is
CS1
is
TH
r
1
19
in Step 1, an available 0603−size thermistor with a value
close to R
which has resistance values of A = 0.3359 and B = 0.0771.
Using the equations in Step 4, r
and r
thermistor of 220 kW would be a reasonable selection,
making k equal to 1.005. Finally, R
to be 72.2 kW and 146 kW. Choosing the closest 1% resistor
values yields a choice of 71.5 kW and 147 kW.
C
platforms is typically recommended by Intel. For systems
containing both bulk and ceramic capacitors, however, the
following guidelines can be a helpful supplement.
ceramic capacitance (C
type of capacitors used. Keep in mind that the best location
to place ceramic capacitors is inside the socket; however, the
physical limit is twenty 0805−size pieces inside the socket.
Additional ceramic capacitors can be placed along the outer
edge of the socket. A combined ceramic capacitor value of
40 mF to 50 mF is recommended and is usually composed of
multiple 10 mF or 22 mF capacitors.
within its limits. The upper limit is dependent on the VID
OTF output voltage stepping (voltage step, V
with error of V
critical capacitance for load release at a given maximum load
step, DI
allows a maximum V
more than the VID voltage for a step−off load current.
r
r
OUT
For example, if a thermistor value of 100 kW is selected
The required output decoupling for processors and
Select the number of ceramics and determine the total
Ensure that the total amount of bulk capacitance (C
CS1
TH
5. Calculate R
6. Calculate values for R
+
TH
Selection
+
thermistor of the closest value available. In
addition, compute a scaling factor k based on the
ratio of the actual thermistor value used relative to
the computed one:
following equations:
O
1*r
1*r
. The current version of the IMVP−6+ specification
R
R
is 1.094. Solving for r
CS
1
CS1
CS2
CS2
1
CS2
is the Vishay NTHS0603N04 NTC thermistor,
(1 * A)
1
*
+ R
+ R
ERR
*
r
k +
CS1
r
1
1
CS
CS
); the lower limit is based on meeting the
TH
*r
CCGFX
1
R
CS2
= r
TH(CALCULATED)
Z
R
k
((1 * k) ) (k
). This is based on the number and
TH
TH(ACTUAL)
r
overshoot (V
× R
CS1
CS1
CS1
CS
TH
and R
, and then select a
CS1
is 0.359, r
yields 219 kW, so a
r
CS2
and R
CS2
OSMAX
))
by using the
CS2
V
CS2
, in time, t
) of 10 mV
are found
is 0.729,
(eq. 14)
(eq. 15)
(eq. 16)
X
) is
V
,