MAX8620YETD+T Maxim Integrated Products, MAX8620YETD+T Datasheet - Page 7

• Manufacturer Part Number: MAX8620YETD+T
• Description: IC UPMIC FOR MPU 14-TDFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8620YETD+T

• Applications: Micro-Power Management Integrated Circuit (UPMIC), DSPs
• Voltage - Input: 2.7 ~ 5.5 V
• Number Of Outputs: 3
• Voltage - Output: 0.6 ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TDFN Exposed Pad
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 45 C
• Output Current: 500 mA
• Output Voltage: 0.6 V to 3.3 V
• Supply Current: 115 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN
EP
10
11
12
13
14
1
2
3
4
5
6
7
8
9
PWR_ON
HF_PWR
NAME
RESET
OUT1
OUT2
SEL1
SEL2
GND
EN2
IN2
IN1
BP
FB
LX
EP
_______________________________________________________________________________________
LDO Output-Voltage Select Input 1. SEL1 and SEL2 set the OUT1 and OUT2 voltages to one of nine
combinations (Table 1).
LDO Output-Voltage Select Input 2. SEL1 and SEL2 set the OUT1 and OUT2 voltages to one of nine
combinations (Table 1).
OUT2 Enable Input. Drive EN2 low to enable OUT2. Drive EN2 high to disable OUT2. If the MAX8620Y
is placed into shutdown (PWR_ON = HF_PWR = low), OUT2 does not power regardless of the status
of EN2 (Table 2, Figure 4).
Open-Drain, Active-Low Reset Output. RESET asserts low when V
regulation. RESET remains asserted for t
also asserts when OUT1 is disabled (Figure 4). RESET deasserts if OUT1 is enabled and V
above 87% of regulation after t
Reference Bypass Capacitor Node. Bypass BP with a 0.01µF capacitor to GND. BP is high
impedance when the MAX8620Y is disabled (PWR_ON = HF_PWR = low).
Hands-Free Enable Input. Drive HF_PWR high or apply a pulse to enable the MAX8620Y. Power is
enabled for 1.31s (typ) following a rising edge at HF_PWR (Table 2, Figure 4).
Power-Enable Input. Drive PWR_ON high to enable the MAX8620Y (Table 2, Figure 4). Drive PWR_ON
low to enter shutdown mode. In shutdown, the LX node is high impedance and both LDOs are
disabled (depending on the state of HF_PWR).
Step-Down Converter Output-Voltage Feedback Input. V
center of an external resistor-divider between LX and GND to set V
the Setting the Step-Down Output Voltage (OUT3) section).
Ground. Connect GND to the exposed pad.
Inductor Connection. LX is internally connected to the drain of the internal p-channel power MOSFET
and the drain of the n-channel synchronous rectifier. LX is high impedance when OUT3 is disabled.
Power Input 2. Connect IN2 to IN1 as close to the device as possible.
Power Input 1. Connect IN1 to IN2 as close to the device as possible. Bypass IN1 to GND with a 10µF
ceramic capacitor, as close to the device as possible.
300mA LDO Output 1. Bypass OUT1 to GND with a 4.7µF ceramic capacitor for 300mA applications,
or a 2.2µF ceramic capacitor for 150mA applications. OUT1 is high impedance when disabled.
300mA LDO Output 2. Bypass OUT2 to GND with a 4.7µF ceramic capacitor for 300mA applications,
or a 2.2µF ceramic capacitor for 150mA applications. OUT2 is high impedance when disabled.
Exposed Pad. Connect EP to GND.
µPMIC for Microprocessors or DSPs
RP
.
RP
in Portable Equipment
after V
FUNCTION
OUT1
rises above 87% (typ) of regulation. RESET
FB
regulates to 0.6V (typ). Connect FB to the
OUT1
OUT3
drops below 87% (typ) of
between 0.6V and 3.3V (see
Pin Description
OUT1
is
7