NCP4201MNR2G ON Semiconductor, NCP4201MNR2G Datasheet

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... IMON 8 IREF ORDERING INFORMATION Device* Package NCP4201MNR2G QFN40 *The “G’ suffix indicates Pb−Free package. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 QFN40 6x6 CASE 488AR ...

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LIMIT 2 ALERT REGISTERS COMPARATOR 3 FAULT STATUS REGISTERS UVLO SHUTDOWN 850mV GND 7 – Overvoltage Threshold – CSREF + + Undervoltage Threshold – PWRGD 40 DELAY ILIMITFS 19 IREF 9 COM 14 TRDET + 12 Voltage ...

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ODN VID7 VID6 ILIMFS CSCOMP VID5 CSSUM VID4 CSREF VID3 FB VID2 COMP VID1 VID0 FBRTN PSI TRDET RAMPADJ PWRGD 4.7uF Figure 2. Application Circuit http://onsemi.com 3 ...

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ABSOLUTE MAXIMUM RATINGS Parameter Input Voltage Range (Note 1) FBRTN PWM2 to PWM4, RAMPADJ SW1 to SW4 SW1 to SW4 (< 200 ns) All Other Inputs and Outputs Storage Temperature Range Operating Ambient Temperature Range ESD Capability, Human Body Model ...

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PIN FUNCTION DESCRIPTIONS Pin No Mnemonic 1 VCC3 3.3 V Power Supply Output. A capacitor from this pin to ground provided decoupling for the interval 3.3 V LDO. 2 ALERT ALERT Output. Open drain output that asserts low when the ...

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ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol REFERENCE CURRENT Reference Bias Voltage V IREF Reference Bias Current I IREF ERROR AMPLIFIER Output Voltage Range (Note 1) V COMP Accuracy V V FB(BOOT) Load Line Positioning Accuracy Load Line Range ...

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ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol PSI Input Low Voltage Input High Voltage Input Current Assertion Timing De−assertion Timing TRDET Output Low Voltage V IMON Clamp Voltage Accuracy Output Current Offset CURRENT LIMIT COMPARATOR I Bias Current I ...

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ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol POWER−GOOD COMPARATOR Undervoltage Threshold V PWRGD(UV) Undervoltage Adjustment Range Low Undervoltage Adjustment Range High Overvoltage Threshold V PWRGD(OV) Overvoltage Adjustment Range Low Overvoltage Adjustment Range High Output Low Voltage V OL(PWRGD) Power ...

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ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol SUPPLY VCC (Note 1) DC Supply Current UVLO Turn−On Current UVLO Threshold Voltage V UVLO Turn−Off Voltage VCC3 Output Voltage VCC3 1. Refer to Electrical Characteristics and Application Information for Safe Operating ...

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VCC3 ALERT FAULT SDA SDL +1. GND IMON IREF RT 121 k W Figure 4. Closed−Loop Output Voltage Accuracy 12 V ADP4201 680 W 680 W VCC 30 CSCOMP 18 100 CSSUM 17 1 ...

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Description The NCP4201 Phase DC−DC regulator with a PMBus Interface. A typical application circuit is shown in Figure 2. Startup Sequence The NCP4201 follows the startup sequence shown in Figure 7. After both the EN and UVLO ...

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Figure 8 shows typical startup waveforms for the NCP4201. Figure 8. Typical Startup Waveforms Phase Detection During startup, the number of operational phases and their phase relationship is determined by the internal circuitry that monitors the PWM outputs. Normally, the ...

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The CPU current can also be monitored over the PMBus. The current limit and the load−line can be adjusted from the circuit component values over the PMBus. Current Limit Set−Point The current limit threshold on the NCP4201 is programmed by ...

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From the Current Limit Set−point paragraph we know the following LOAD I + ILIMFS R LIMIFS LOAD IMON R LIMFS For a 150 A current limit R = 7.5 kW. Assuming ...

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The value of R can be found using the following B equation VID ONL offset voltage can be added to the control voltage over the serial interface. This is done using ...

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The PWRGD circuitry also incorporates an initial turn−on delay time (TD5). Prior to the SS voltage reaching the programmed VID DAC voltage and the PWRGD masking time finishing, the PWRGD pin is held low. Once the SS circuit reaches the ...

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ICC (UVLO) Figure 10. Typical Shunt Resistor Value and Power Dissipation for Different UVLO Voltage The maximum power dissipated is calculated using Equation IN(MAX) ...

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SCL SDA START BY MASTER SCL SDA START BY MASTER 1 SCL SDA 1 1 START BY MASTER 1 SCL SDA 1 1 REPEATED START BY MASTER SERIAL BUS ADDRESS BYTE Write Operations The PMBus specification defines several protocols for ...

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For the NCP4201, the send byte protocol is used to clear faults. This operation is shown in Figure 14 COMMAND SLAVE CODE ADDRESS Figure 14. Send Byte Command If the master is required ...

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Read Word In this operation, the master device receives two data bytes from a slave device as follows: 1. The master device asserts a start condition on SDA. 2. The master sends the 7−bit slave address followed by the write ...

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Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 1.55625 0 1.55000 0 1.54375 0 1.53750 0 1.53125 0 1.52500 0 1.51875 0 1.51250 0 1.50625 0 1.50000 0 1.49375 0 1.48750 0 1.48125 0 ...

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Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 1.28750 0 1.28125 0 1.27500 0 1.26875 0 1.26250 0 1.25625 0 1.25000 0 1.24375 0 1.23750 0 1.23125 0 1.22500 0 1.21875 0 1.21250 0 ...

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Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 1.01875 0 1.01250 0 1.00625 0 1.00000 0 0.99375 0 0.98750 0 0.98125 0 0.97500 0 0.96875 0 0.96250 0 0.95625 0 0.95000 0 0.94375 0 ...

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Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 0.75000 1 0.74375 1 0.73750 1 0.73125 1 0.72500 1 0.71875 1 0.71250 1 0.70625 1 0.70000 1 0.69375 1 0.68750 1 0.68125 1 0.67500 1 ...

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Table 11. PMBus Commands for the NCP4201 Cmd R/W Default Description Code 0x01 R/W 0x80 Operation 0x02 R/W 0x17 ON_OFF_Config 0x03 W NA Clear_Faults 0x10 R/W 0x00 Write Protect 0x19 R 0xB0 Capability 0x20 R 0x20 VOUT_MODE 0x21 R/W 0x00 ...

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Cmd R/W Default Description Code 0x26 R/W 0x00B2 VOUT_MARGIN_LOW 0x38 R/W 0x0001 IOUT_CAL_GAIN 0x39 R/W 0x0000 IOUT_CAL_OFFSET 0x4A R/W 0x0064 IOUT_OC_WARN_LIMIT 0x68 R/W 0x012C POUT_OP_FAULT_LIMIT 0x6A R/W 0x012C POUT_OP_WARN LIMIT 0x78 R 0x00 STATUS BYTE 0x79 R 0x0000 STATUS WORD ...

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Cmd R/W Default Description Code 0x7A R 0x00 STATUS VOUT 0x7B R 0x00 STATUS IOUT 0x7E R 0x00 STATUS CML # Comment Bytes High 3 POWER_ GOOD High 2 Res High 1 OTHER High 0 Res 1 Bit Name 7 ...

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Cmd R/W Default Description Code 0x80 R 0x00 STATUS_ALERT 0x88 R 0x00 0x8B R 0x00 READ_VOUT 0x8C R 0x00 READ_IOUT 0x8D R 0x00 0x96 R 0x00 READ_POUT 0x99 R 0x4101 MFR_ID 0x9A R 0x0002 MFR_MODEL 0x9B R 0x0301 MFR_REVISION Table ...

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Cmd R/W Default Description Code 0xD2 R/W 0x52 VR Config. 1A 0xD3 R/W 0x52 VR Config. 1B 0xD4 R/W 0x03 Ton Delay 0xD5 R/W 0x02 Ton Rise 0xD6 R/W 0x01 Ton Transition 0xD8 R 0x00 EN/VTT Voltage 0xDA R 0x00 ...

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Cmd R/W Default Description Code 0xDF R/W 0x00 Load−line Set 0xE0 R/W 0x00 PWRGD Hi Threshold 0xE1 R/W 0x00 PWRGD Lo Threshold 0xE2 R/W 0x10 Current Limit Threshold 0xE3 R/W 0x10 Phase Bal SW1 0xE4 R/W 0x10 Phase Bal SW2 ...

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Cmd R/W Default Description Code 0xFA R/W 0x00 Mask FAULT 0xFB R 0x00 General Status 0xFC R 0x00 Phase Status # Comment Bytes 3 Mask CML Masks any ALERT caused by bits in Status CML Register Masks any ...

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... Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...