ncp4201 ON Semiconductor, ncp4201 Datasheet

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ncp4201

Manufacturer Part Number
ncp4201
Description
Ncp4201 Programmable Multi-phase Synchronous Buck Converter With Pmbus
Manufacturer
ON Semiconductor
Datasheet

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Part Number:
NCP4201
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
ncp4201MNR2G
Manufacturer:
ON Semiconductor
Quantity:
2 000
NCP4201
Programmable Multi-Phase
Synchronous Buck
Converter with PMBus
interface. It combines a highly efficient, multi−phase, synchronous
buck switching regulator controller with a PMBus interface, which
enables digital programming of key system parameters to optimize
system performance and provide feedback to the system.
code directly from the processor, which is used to set the output
voltage between 0.375 V and 1.6 V.
logic−level outputs at a programmable switching frequency that can
be optimized for VR size and efficiency. The NCP4201 can be
programmed to provide 2−, 3−, or 4−phase operation, allowing for the
construction of up to four complementary buck−switching stages. The
NCP4201 supports PSI, which is a Power Save Mode.
program system set points such as voltage offset, load−line and phase
balance and output voltage. Key system performance data, such as
CPU current, CPU voltage, and power and fault conditions can also be
read back over the PMBus from the NCP4201.
temperature range of 0°C to +85°C and is available in a 40 Lead QFN
package.
Features
Applications
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 0
The NCP4201 is an integrated power control IC with a PMBus
It uses an internal 8−bit DAC to read a Voltage Identification (VID)
This device uses a multi−mode PWM architecture to drive the
The NCP4201 includes a PMBus interface which can be used to
The NCP4201 is specified over the extended commercial
and Read−back of Monitored Values
Drivers
(OTF) VID Code Changes
VR11 and VR11.1 Specifications
Latchoff Delay
Selectable 2−, 3−, or 4−Phase Operation at Up to 1.5 MHz per Phase
PMBus Interface − Enables Digital Programmability of Set Points
Logic−Level PWM Outputs for Interface to External High Power
Fast−Enhanced PWM for Excellent Load Transient Performance
Active Current Balancing Between All Output Phases
Built−In Power−Good/Crowbar Blanking Supports On−The−Fly
Digitally Programmable 0.375 V to 1.6 V Output Supports Both
Programmable Short−Circuit Protection with Programmable
Supports PSI – Power Saving Mode During Light Loads
Desktop PC Power Supplies for VRM Modules
1
*The “G’ suffix indicates Pb−Free package.
†For information on tape and reel specifications,
NCP4201MNR2G
ALERT
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
FAULT
IMON
VCC3
IREF
GND
SDA
SCL
Device*
EN
RT
ORDERING INFORMATION
1
2
3
4
5
6
7
8
9
10
A
WL
YYWW = Date Code
G
MARKING DIAGRAM
1
http://onsemi.com
PIN ASSIGNMENT
40
PIN 1
INDICATOR
AWLYYWWG
= Assembly Location
= Wafer Lot
= Pb−Free Package
NCP4201
NCP4201
TOP VIEW
Package
QFN40
Publication Order Number:
CASE 488AR
QFN40 6x6
2500/Tape & Reel
Shipping
30
29
28
27
26
25
24
23
22
21
NCP4201/S
VCC
PWM1
PWM2
PWM3
PWM4
SW1
SW2
SW3
SW4
OD1

Related parts for ncp4201

ncp4201 Summary of contents

Page 1

... The NCP4201 supports PSI, which is a Power Save Mode. The NCP4201 includes a PMBus interface which can be used to program system set points such as voltage offset, load−line and phase balance and output voltage. Key system performance data, such as CPU current, CPU voltage, and power and fault conditions can also be read back over the PMBus from the NCP4201 ...

Page 2

... CMP – ADC + CURRENT CMP BALANCING – CIRCUIT + CMP CONTROL – + CMP – CROWBAR CONTROL CURRENT MEASUREMENT AND LIMIT CONTROL – + NCP4201 CONTROL VID DAC VID1 VID2 VID3 VID4 VID5 VID6 VID7 http://onsemi.com 2 VCC VCC3 1 30 3.3V REGULATOR ...

Page 3

ODN VID7 VID6 ILIMFS CSCOMP VID5 CSSUM VID4 CSREF VID3 FB VID2 COMP VID1 VID0 FBRTN PSI TRDET RAMPADJ PWRGD 4.7uF Figure 2. Application Circuit http://onsemi.com 3 ...

Page 4

ABSOLUTE MAXIMUM RATINGS Parameter Input Voltage Range (Note 1) FBRTN PWM2 to PWM4, RAMPADJ SW1 to SW4 SW1 to SW4 (< 200 ns) All Other Inputs and Outputs Storage Temperature Range Operating Ambient Temperature Range ESD Capability, Human Body Model ...

Page 5

... PWM4 to PWM1 Logic−Level PWM Outputs. Each output is connected to the input of an external MOSFET driver such as the ADP3121. Connecting the PWM4, and PWM3 outputs to VCC causes that phase to turn off, allowing the NCP4201 to operate as a 2−phase controller. 30 VCC Supply Voltage for the Device. ...

Page 6

ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol REFERENCE CURRENT Reference Bias Voltage V IREF Reference Bias Current I IREF ERROR AMPLIFIER Output Voltage Range (Note 1) V COMP Accuracy V V FB(BOOT) Load Line Positioning Accuracy Load Line Range ...

Page 7

ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol PSI Input Low Voltage Input High Voltage Input Current Assertion Timing De−assertion Timing TRDET Output Low Voltage V IMON Clamp Voltage Accuracy Output Current Offset CURRENT LIMIT COMPARATOR I Bias Current I ...

Page 8

ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol POWER−GOOD COMPARATOR Undervoltage Threshold V PWRGD(UV) Undervoltage Adjustment Range Low Undervoltage Adjustment Range High Overvoltage Threshold V PWRGD(OV) Overvoltage Adjustment Range Low Overvoltage Adjustment Range High Output Low Voltage V OL(PWRGD) Power ...

Page 9

ELECTRICAL CHARACTERISTICS (Note 1 and 3). Parameter Symbol SUPPLY VCC (Note 1) DC Supply Current UVLO Turn−On Current UVLO Threshold Voltage V UVLO Turn−Off Voltage VCC3 Output Voltage VCC3 1. Refer to Electrical Characteristics and Application Information for Safe Operating ...

Page 10

... W CSREF CSCOMP – GND Figure 5. Current Sense Amplifier VOS TEST CIRCUITS 8 BIT VID CODE +1 F VCC PWM1 PWM2 PWM3 PWM4 NCP4201 SW1 SW2 SW3 SW4 OD1 100 680 W 680 Figure 6 ...

Page 11

... Description The NCP4201 Phase DC−DC regulator with a PMBus Interface. A typical application circuit is shown in Figure 2. Startup Sequence The NCP4201 follows the startup sequence shown in Figure 7. After both the EN and UVLO conditions are met, a programmable internal timer goes through one delay cycle TD1 ...

Page 12

... Master Clock Frequency The clock frequency of the NCP4201 is set with an external resistor connected from the RT pin to ground. The frequency follows the graph in Figure 3. To determine the frequency per phase, the clock is divided by the number of phases in use ...

Page 13

... The current limit delay time only starts after TD5 has completed. If there is a current limit during startup, the NCP4201 will go through TD1 to TD5 and then start the latchoff time. Because the controller continues to cycle the phases during ...

Page 14

... Table 10. The VID code is set using the VID Input pins or it can be programmed over the PMBus using the VOUT_Command. By default, the NCP4201 outputs a voltage corresponding to the VID Inputs. To output a voltage following the VOUT_Command the user first needs to program the required VID Code. Then the VID_EN Bits need to be enabled ...

Page 15

... PWRGD or CROWBAR event. Each VID change resets the internal timer VID off code is detected the NCP4201 will wait for 5 msec to ensure that the code is correct before initiating a shutdown of the controller. The NCP4201 also uses the TON_Transition command code (0xD6) to limit the DVID slew rates ...

Page 16

... V to 2.0 V. Voltages greater than 2.0 V can be monitored using a resistor divider network. Voltage measurements are 10 bits wide. Shunt Resistor The NCP4201 uses a shunt to generate 5.0 V from the 12 V supply range. A trade−off can be made between the power dissipated in the shunt resistor and the UVLO threshold. ...

Page 17

... Control of the NCP4201 is carried out using the PMBus Interface. The physical protocol for PMBus closely matches that of SMBus. The NCP4201 is connected to this bus as a slave device, under the control of a master controller. Data is sent over the serial bus in sequences of nine clock pulses: eight bits of data followed by an acknowledge bit from the slave device ...

Page 18

... START BY MASTER SERIAL BUS ADDRESS BYTE Write Operations The PMBus specification defines several protocols for different types of read and writes operations. The ones used in the NCP4201 are discussed in this section. The following abbreviations are used in the diagrams: S—START P—STOP R—READ W—WRITE A— ...

Page 19

... For the NCP4201, the send byte protocol is used to clear faults. This operation is shown in Figure 14 COMMAND SLAVE CODE ADDRESS Figure 14. Send Byte Command If the master is required to read data from the register immediately after setting up the address, it can assert a repeat ...

Page 20

... NCP4201 register settings, the lock bit can be set. Setting Bit 0 of the Lock/Reset sets the lock bit and locks critical registers. In this mode, certain registers can no longer be written to until the NCP4201 is powered down and powered up again. For more information on which registers are locked see the Register Map. ...

Page 21

... Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 1.55625 0 1.55000 0 1.54375 0 1.53750 0 1.53125 0 1.52500 0 1.51875 0 1.51250 0 1.50625 0 1.50000 0 1.49375 0 1.48750 0 1.48125 0 1.47500 0 1.46875 0 1.46250 0 1.45625 0 1.45000 0 1.44375 0 1.43750 0 1.43125 0 1.42500 0 1.41875 0 1.41250 0 1.40625 0 1.40000 0 1.39375 0 1.38750 0 1.38125 0 1 ...

Page 22

... Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 1.28750 0 1.28125 0 1.27500 0 1.26875 0 1.26250 0 1.25625 0 1.25000 0 1.24375 0 1.23750 0 1.23125 0 1.22500 0 1.21875 0 1.21250 0 1.20625 0 1.20000 0 1.19375 0 1.18750 0 1.18125 0 1.17500 0 1.16875 0 1.16250 0 1.15625 0 1.15000 0 1.14375 0 1.13750 0 1.13125 0 1.12500 0 1.11875 0 1.11250 0 1 ...

Page 23

... Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 1.01875 0 1.01250 0 1.00625 0 1.00000 0 0.99375 0 0.98750 0 0.98125 0 0.97500 0 0.96875 0 0.96250 0 0.95625 0 0.95000 0 0.94375 0 0.93750 0 0.93125 0 0.92500 0 0.91875 0 0.91250 0 0.90625 0 0.90000 0 0.89375 0 0.88750 0 0.88125 0 0.87500 0 0.86875 0 0.86250 0 0.85625 0 0.85000 0 0.84375 0 0 ...

Page 24

... Table 10. VR11.1 and VR11 x VID CODES for the NCP4201 OUTPUT VID7 VID6 0.75000 1 0.74375 1 0.73750 1 0.73125 1 0.72500 1 0.71875 1 0.71250 1 0.70625 1 0.70000 1 0.69375 1 0.68750 1 0.68125 1 0.67500 1 0.66875 1 0.66250 1 0.65625 1 0.65000 1 0.64375 1 0.63750 1 0.63125 1 0.62500 1 0.61875 1 0.61250 1 0.60625 1 0.60000 1 0.59375 1 0.58750 1 0.58125 1 0.57500 1 0 ...

Page 25

... NCP4201 has an SMBus ALERT pin and ARA is supported 3:0 000 Reserved for future use 1 The NCP4201 supports VID mode for programming the output voltage. 2 Sets the output voltage using VID. 2 Sets the output voltage when operation command is set to Margin High. Programmed in VID Mode. ...

Page 26

... Bit Name 7 BUSY A fault was declared because the NCP4201 was busy and unable to respond. 6 OFF This bit is set whenever the NCP4201 is not switching. 5 VOUT_OV This bit gets set whenever the NCP4201 goes into OVP mode. 4 IOUT_OC This bit gets set whenever the NCP4201 latches off due to an overcurrent event ...

Page 27

... Not applicable. UNDER VOLTAGE FAULT 3 Res 2 Res 1 Res 0 Res 1 Bit Name 7 I This bit gets set if the NCP4201 latches off due OUT Overcurrent to an OCP Event. Fault 6 Res 5 I This bit gets set if I OUT Overcurrent high warning limit. Warning 4 Res 3 ...

Page 28

... R 0x00 READ_IOUT 0x8D R 0x00 0x96 R 0x00 READ_POUT 0x99 R 0x4101 MFR_ID 0x9A R 0x0002 MFR_MODEL 0x9B R 0x0301 MFR_REVISION Table 12. Manufacturer Specific Command Codes for the NCP4201 Cmd R/W Default Description Code 0xDO R/W 0x00 Lock/Reset 0xD1 R/W 0x07 Mfr Config # Comment Bytes 1 Bit Name 7 Res 6 ...

Page 29

Cmd R/W Default Description Code 0xD2 R/W 0x52 VR Config. 1A 0xD3 R/W 0x52 VR Config. 1B 0xD4 R/W 0x03 Ton Delay 0xD5 R/W 0x02 Ton Rise 0xD6 R/W 0x01 Ton Transition 0xD8 R 0x00 EN/VTT Voltage 0xDA R 0x00 ...

Page 30

Cmd R/W Default Description Code 0xDF R/W 0x00 Load−line Set 0xE0 R/W 0x00 PWRGD Hi Threshold 0xE1 R/W 0x00 PWRGD Lo Threshold 0xE2 R/W 0x10 Current Limit Threshold 0xE3 R/W 0x10 Phase Bal SW1 0xE4 R/W 0x10 Phase Bal SW2 ...

Page 31

Cmd R/W Default Description Code 0xFA R/W 0x00 Mask FAULT 0xFB R 0x00 General Status 0xFC R 0x00 Phase Status # Comment Bytes 3 Mask CML Masks any ALERT caused by bits in Status CML Register Masks any ...

Page 32

... PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A3 0.20 REF b 0.18 0.30 D 6.00 BSC D2 4.00 4.20 E 6.00 BSC E2 4.00 4.20 e 0.50 BSC L 0.30 0.50 K 0.20 −−− 6.30 4.20 4.20 6.30 36X 0.50 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP4201/S ...

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