EL5325IREZ Intersil, EL5325IREZ Datasheet - Page 7

• Manufacturer Part Number: EL5325IREZ
• Description: IC VOLT GEN 12CH TFT-LCD 28TSSOP
• Manufacturer: Intersil

Specifications of EL5325IREZ

• Applications: Converter, TFT, LCD
• Voltage - Input: 5 ~ 16.5 V
• Number Of Outputs: 12
• Voltage - Output: 0.5 ~ 14.95 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog Section
TRANSFER FUNCTION
The transfer function is:
where data is the decimal value of the 10-bit data binary
input code.
The output voltages from the EL5325 will be derived from
the reference voltages present at the V
pins. The impedance between those two pins is about 32kΩ.
Care should be taken that the system design holds these two
reference voltages within the limits of the power rails of the
EL5325. GND < V
In some LCD applications that require more than 12
channels, the system can be designed such that one
EL5325 will provide the Gamma correction voltages that are
more positive than the V
can provide the Gamma correction voltage more negative
than the V
system connected in this way.
V
CONTROL
C1
OUT IDEAL )
0
0
0
0
0
0
(
C0
0
0
0
0
0
1
COM
CHANNEL ADDRESS
A3
=
0
0
0
0
0
0
PARAMETER
V
potential. The Application Drawing shows a
REFL
REFH
A2
0
0
0
0
1
1
t
t
t
t
t
t
HE
HD
SD
r
SE
T
W
/t
+
f
≤ V
data
------------ -
1024
COM
A1
0
0
0
1
1
1
S
and GND ≤ V
×
potential. The second EL5325
7
A0
(
0
0
0
1
1
1
V
REFH
D9
0
1
1
1
0
0
- V
REFL
D8
REFL
REFL
0
1
0
0
0
0
TABLE 3. SERIAL PROGRAMMING EXAMPLES
and V
TABLE 2. SERIAL TIMING PARAMETERS
RECOMMENDED OPERATING RANGE
)
D7
≤ V
0
1
0
0
0
0
REFH
REFH
D6
0
1
0
0
0
0
.
D5
0
1
0
0
0
0
EL5325
DATA
0.05 * T
0.50 * T
≥200ns
≥10ns
≥10ns
≥10ns
≥10ns
D4
0
1
0
0
1
1
D3
CLOCK OSCILLATOR
The EL5325 requires an internal clock or external clock to
refresh its outputs. The outputs are refreshed at the falling OSC
clock edges. The output refreshed switches open at the rising
edges of the OSC clock. The driving load shouldn’t be changed
at the rising edges of the OSC clock. Otherwise, it will generate
a voltage error at the outputs. This clock may be input or output
via the clock pin labeled OSC. The internal clock is provided by
an internal oscillator running at approximately 21kHz and can
be output to the OSC pin. In a 2 chip system, if the driving loads
are stable, one chip may be programmed to use the internal
oscillator; then the OSC pin will output the clock from the
internal oscillator. The second chip may have the OSC pin
connected to this clock source.
For transient load application, the external clock Mode
should be used to ensure all functions are synchronized
together. The positive edge of the external clock to the OSC
pin should be timed to avoid the transient load effect. The
Application Drawing shows the LCD H rate signal used, here
the positive clock edge is timed to avoid the transient load of
the column driver circuits.
After power on, the chip will start with the internal oscillator
mode. At this time, the OSC pin will be in a high impedance
condition to prevent contention. By setting B14 to high, the
chip is on external clock mode. Setting B14 to low, the chip is
on internal clock mode.
0
1
0
0
1
1
D2
0
1
0
0
1
1
D1
0
1
0
0
1
1
D0
1‘t
0
1
0
1
1
Clock Period
Clock Rise/Fall Time
ENA Hold Time
ENA Setup Time
Data Hold Time
Data Setup Time
Clock Pulse Width
Internal Oscillator, Channel A, Value = 0
Internal Oscillator, Channel A, Value = 1023
Internal Oscillator, Channel A, Value = 512
Internal Oscillator, Channel C, Value = 513
Internal Oscillator, Channel H, Value = 31
External Oscillator, Channel H, Value = 31
DESCRIPTION
CONDITION