EL5325IREZ Intersil, EL5325IREZ Datasheet - Page 2

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EL5325IREZ

Manufacturer Part Number
EL5325IREZ
Description
IC VOLT GEN 12CH TFT-LCD 28TSSOP
Manufacturer
Intersil
Datasheet

Specifications of EL5325IREZ

Applications
Converter, TFT, LCD
Voltage - Input
5 ~ 16.5 V
Number Of Outputs
12
Voltage - Output
0.5 ~ 14.95 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Absolute Maximum Ratings
Supply Voltage between V
Supply Voltage between V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
Electrical Specifications
SUPPLY
I
I
ANALOG
V
V
I
PSRR
t
V
∆V
V
R
REG
CAP
DIGITAL
V
F
V
t
t
t
t
t
R
T
Duty Cycle
INL
DNL
F_OSC
S
SD
SC
D
S
H
LC
CE
DCO
PARAMETER
AC
CLK
PULSE
OL
OH
DROOP
INH
IH
IL
SDIN
MIS
Supply Current
Digital Supply Current
Output Swing Low
Output Swing High
Short Circuit Current
Power Supply Rejection Ratio
Program to Out Delay
Accuracy referred to the ideal value
Channel to Channel Mismatch
Droop Voltage
Input Resistance @ V
Load Regulation
Band Gap
Logic 1 Input Voltage
Clock Frequency
Logic 0 Input Voltage
Setup Time
Hold Time
Load to Clock Time
Clock to Load Line
Clock to Out Delay Time
S
Minimum Pulse Width for EXT_OSC Signal
Duty Cycle for EXT_OSC Signal
Integral Nonlinearity Error
Differential Nonlinearity Error
Internal Refresh Oscillator Frequency
DIN
Input Resistance
S
SD
& GND . . . . . . 4.5V (min) to 18V (max)
& GND . 3V (min) to V
DESCRIPTION
2
V
specified.
S
(T
= 15V, V
A
REFH
= 25°C)
, V
SD
REFL
= 5V, V
S
J
and 7V (max)
= T
REFH
C
= T
A
No load
Sinking 5mA (V
Sourcing 5mA (V
R
V
Code = 512
Code = 512
I
By pass with 0.1µF
V
V
V
Negative edge of SCLK
OSC_Select = 0
= 13V, V
OUT
L
S
SD
SD
SD
+ is moved from 14V to 16V
EL5325
= 10Ω
= 5V
= 3.3V
= 3.3V/5V
= 5mA step
REFL
= 2V, R
CONDITIONS
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
REFH
REFH
L
= 15V, V
= 1.5kΩ and C
= 15V, V
REFL
REFL
= 0)
L
= 0)
= 200pF to 0V, T
14.85
MIN
100
45
1
4
2
14.95
A
TYP
10.2
0.17
140
0.5
1.3
1.3
0.5
20
10
50
21
50
65
32
20
20
20
20
= 25°C, unless otherwise
4
2
1
1
5
MAX
12.5
0.35
150
1.5
1.6
2
5
1
mV/mA
mV/ms
UNIT
MHz
LSB
LSB
kHz
mA
mA
mV
mA
mV
mV
GΩ
ms
kΩ
dB
ns
ns
ns
ns
ns
µs
%
V
V
V
V
V

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