ISL6263CRZ Intersil, ISL6263CRZ Datasheet - Page 13

• Manufacturer Part Number: ISL6263CRZ
• Description: IC VREG CORE 5BIT 1PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6263CRZ

• Applications: Converter, Intel IMVP-6
• Voltage - Input: 5 ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.41 ~ 1.29 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Adaptive shoot-through protection prevents the gate-driver
outputs from going high until the opposite gate-driver output
has fallen below approximately 1V. The UGATE turn-on
propagation delay t
delay t
The power for the LGATE gate-driver is sourced directly from
the PVCC pin. The power for the UGATE gate-driver is
sourced from a boot-strap capacitor connected across the
BOOT and PHASE pins. The boot capacitor is charged from
PVCC through an internal boot-strap diode each time the
low-side MOSFET turns on, pulling the PHASE pin low.
Internal Bootstrap Diode
The ISL6263 has an integrated boot-strap Schottky diode
connected from the PVCC pin to the BOOT pin. Simply
adding an external capacitor across the BOOT and PHASE
pins completes the bootstrap circuit.
The minimum value of the bootstrap capacitor can be
calculated from Equation 2:
C
BOOT
UGATE
LGATE
FIGURE 7. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
PWM
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
PDRL
≥
0.0
FIGURE 6. GATE DRIVER TIMING DIAGRAM
----------------------- -
ΔV
20nC
Q
GATE
t
BOOT
are found in the Electrical Specifications table.
PDRU
0.1
VOLTAGE
0.2
Q
PDRU
GATE
0.3
= 100nC
and LGATE turn-on propagation
ΔV
0.4
t
PDRL
13
BOOT_CAP
0.5
0.6
(V)
0.7
0.8
0.9
(EQ. 2)
1V
1V
1.0
ISL6263
where Q
charge the gate of the upper MOSFET. The ΔV
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate
charge, Q
the drive voltage at the end of a PWM cycle is 200mV. One
will find that a bootstrap capacitance of at least 0.125µF is
required. The next larger standard value capacitance is
0.15µF. A good quality ceramic capacitor is recommended.
Soft-Start and Soft Dynamic VID Slew Rates
The output voltage of the converter tracks V
voltage across the SOFT and VSS pins. Shown in Figure 1,
the SOFT pin is connected to the output of the VID DAC
through the unidirectional soft-start current source I
bidirectional soft-dynamic VID current source I
non-inverting input of the error amplifier. Current is sourced
from the SOFT pin when I
both source and sink current when I
soft-start capacitor C
proportional to I
selects I
current through the output capacitors is maintained below
the OCP threshold. Once soft-start has completed, I
automatically selected for output voltage changes
commanded by the VID inputs, charging C
output voltage is commanded to rise, and discharging
C
The IMVP-6+ Render Voltage Regulator specification
requires a minimum of 10mV/µs for SLEWRATE
value for C
10mV/µs when the soft-dynamic VID current source I
the minimum specified value in the Electrical Specifications
table. The value of C
Equation 3:
Choosing the next lower standard component value of
0.015µF will guarantee 10mV/µs SLEWRATE
choice of C
should expect the output voltage during soft-start to slew to
the voltage commanded by the VID settings at a nominal
rate given by Equation 4:
Note that the slewrate is the average rate of change
between the initial and final voltage values. The slewrate is
moderated as V
by the VID inputs.
C
dV
---------------------- -
SOFT
SOFT
SOFT
dt
when the output voltage is commanded to fall.
=
SS
GATE
=
I
------------------------ -
GATE
DVIDmin
⎛
⎝
SOFT
------------------ -
C
10mV
--------------- -
SOFT
for the soft-start sequence so that the inrush
SOFT
I
μs
SS
is the amount of gate charge required to fully
, of 25nC at 5V and also assume the droop in
SS
CCGFX
⎞
⎠
must guarantee the minimum slew-rate of
controls the startup slew-rate as well. One
=
=
or I
---------------------- -
0.015μF
175μA
----------------- -
SOFT
SOFT
41μA
10K
DVID
approaches the voltage commanded
SS
, can be calculated from
changes voltage at a rate
. The ISL6263 automatically
=
≈
is active. The SOFT pin can
0.0175μF
2.8mV
----------------- -
μs
DVID
is active. The
SOFT
SOFT,
GFX
DVID
BOOT
GFX
when the
. This
the
June 10, 2010
SS
, and the
DVID
. The
DVID
term is
FN9213.2
(EQ. 3)
or the
(EQ. 4)
is
is