ISL6263CRZ Intersil, ISL6263CRZ Datasheet
ISL6263CRZ
Specifications of ISL6263CRZ
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ISL6263CRZ Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006, 2010. All Rights Reserved. R All other trademarks mentioned are the property of their respective owners. ISL6263 FN9213 ...
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... Ordering Information PART NUMBER (Notes 2, 3) ISL6263CRZ ISL 6263CRZ ISL6263CRZ-T ISL 6263CRZ (Note 1) NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020 ...
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Block Diagram VDD V REF + 1.545V − ↓ ↓ VSS 1:1 RBIAS − OCSET OCP + + VSUM − DFB DROOP VO VSEN RTN VDIFF VID0 VID1 VID2 VID DAC DVID VID3 ↓ VID4 SOFT I2UA ...
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Simplified Application Circuit for DCR Current Sensing C VDD R RBIAS C SOFT R I2UA V CC_SNS V SS_SNS R C FSET FSET C COMP1 R C COMP COMP2 R C DIFF2 DIFF R DIFF1 FIGURE 2. ISL6263 GPU RENDER-CORE ...
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Simplified Application Circuit for Resistive Current Sensing C VDD R RBIAS C SOFT R I2UA V CC_SNS V SS_SNS R C FSET FSET C COMP1 R C COMP COMP2 R C DIFF2 DIFF R DIFF1 FIGURE 3. ISL6263 GPU RENDER-CORE ...
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... Junction Temperature Range .-55°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Temperature Range -10°C to 100°C VIN to VSS +5V to +25V VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% PVCC to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ± ...
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Electrical Specifications These specifications apply for +25°C, VDD = 5V, PVCC = 5V. Boldface limits apply over the operating temperature range, A -10°C to +100°C. (Continued) PARAMETER Frequency Range AMPLIFIERS Error Amplifier DC Gain (Note 8) Error ...
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Electrical Specifications These specifications apply for +25°C, VDD = 5V, PVCC = 5V. Boldface limits apply over the operating temperature range, A -10°C to +100°C. (Continued) PARAMETER VR_ON Input High AF_EN Input Low AF_EN Input High VR_ON ...
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BOOT (Pin 17) - Input power supply for the high-side MOSFET gate driver. Connect an MLCC bootstrap capacitor from the BOOT pin to the PHASE pin. UGATE (Pin 18) - High-side MOSFET gate driver output. Connect to the gate of ...
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... Theory of Operation 3 The R Modulator The heart of the ISL6263 is Intersil’s Robust-Ripple Regulator (R ) Technology™. The R of fixed frequency PWM control, and variable frequency hysteretic control that will simultaneously affect the PWM switching frequency and PWM duty cycle in response to input voltage and output load transients. ...
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DROOP pin minus the output voltage measured at the VO pin, is proportional to the total inductor current. This information is used exclusively to achieve the IMVP-6+ load line as well as the overcurrent protection important to note ...
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The converter will automatically enter DEM after eight consecutive PWM pulses where the PHASE pin has detected positive voltage shortly after the LGATE pin has gone high. The converter will return to ...
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Adaptive shoot-through protection prevents the gate-driver outputs from going high until the opposite gate-driver output has fallen below approximately 1V. The UGATE turn-on propagation delay t and LGATE turn-on propagation PDRU delay t are found in the Electrical Specifications table. ...
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... G = 7kΩ, FSET the temperature characteristics G Equation 13 which is higher recommended to begin your droop design using the NTC evaluation board available from Intersil. ⋅ I DCR o NTCEQ , R NTC NTCS, and will be discussed in the next section and R such that the correct droop voltage S ...
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The gain of the droop amplifier circuit is Equation 14: R DRP2 k 1 ------------------- = + droopamp R DRP1 After determining R and R networks, use S NTCEQ Equation 15 to calculate the droop resistances DRP2 ...
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To see whether the NTC network successfully compensates the DCR change over temperature, one can apply full load current and wait for the thermal steady state and see how much the output voltage deviates from the initial voltage reading. A ...
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... The voltage source is the VID state and the output impedance is 8.0mΩ in order to achieve the 8.0mV/A load line highly recommended to design the compensation such that the regulator output impedance is 8.0mΩ. Intersil provides a spreadsheet to 17 ISL6263 calculate the compensator parameters. Caution needs to be used in choosing the input resistor to the FB pin ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Package Outline Drawing L32.5x5 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 4/10 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 80 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 19 ISL6263 A ...