ISL8101IRZ Intersil, ISL8101IRZ Datasheet - Page 9

• Manufacturer Part Number: ISL8101IRZ
• Description: IC PWM CTRLR BUCK 2PHASE 24-QFN
• Manufacturer: Intersil

Specifications of ISL8101IRZ

• Applications: Controller, Intel VRM9, VRM10, and AMD Hammer Applications
• Voltage - Input: 4.6 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.6 ~ 2.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

drive turns the freewheeling element off. The upper
MOSFET is kept on until the clock signals the beginning of
the next switching cycle and the PWM pulse is terminated.
CURRENT SENSING
ISL8101 senses current by sampling the voltage across the
lower MOSFET during its conduction interval. MOSFET
r
for channel current balance and overcurrent protection.
The PHASE pins are used as inputs for each channel.
Internal circuitry samples the lower MOSFETs’ r
voltage, once each cycle, during their conduction periods
and time multiplexes the sampled voltages across the ISEN
resistor. The current that is thus developed through the ISEN
resistor is duplicated and used for channel current balancing
and overcurrent detection.
CHANNEL-CURRENT BALANCE
Another benefit of multiphase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this, the
designer avoids the complexity of driving multiple parallel
MOSFETs and the expense of using expensive heat sinks
and exotic magnetic materials.
In order to fully realize the thermal advantage, it is important
that each channel in a multiphase converter be controlled to
deliver about the same current at any load level. Intersil
multiphase controllers ensure current balance by comparing
each channel’s current to the average current delivered by
all channels and making appropriate adjustments to each
channel’s pulse width based on the error. The error signal
modifies the pulse width to correct any unbalance and force
the error toward zero.
OVERCURRENT PROTECTION
The individual channel currents, as sensed via the PHASE
pins and scaled via the ISEN resistor, are continuously
monitored and compared with an internal 95µA reference
current. If both channels’ currents exceed, at any time, the
reference current, the overcurrent comparator triggers an
overcurrent event. Similarly, an OC event is also triggered if
either channel’s current exceeds the 95µA reference for 7
consecutive switching cycles.
As a result of an OC event, output drives on both channels
turn off both upper and lower MOSFETs. The system then
waits in this state for a period of 4096 switching clock cycles.
The wait period is followed by a soft-start attempt. If the
soft-start attempt is successful, operation continues as
normal. Should the soft-start attempt fail, the ISL8101
repeats the 2048-cycle wait period and follows with another
soft-start attempt. This hiccup mode of operation continues
indefinitely (as depicted in Figure 4) for as long as the
controller is enabled or until the overcurrent condition is
removed.
DS(ON)
sensing is a no-added-cost method to sense current
9
DS(ON)
ISL8101
ISL8101
OUTPUT VOLTAGE SETTING
The ISL8101 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at the
VID pins. The DAC decodes the 5 or 6-bit logic signals into
one of the discrete voltages shown in Tables 1, 2 and 3. Each
VID pin is pulled up to an internal 1.2V voltage by weak
current sources (about 45µA current, decreasing to 0 as the
voltage at the VID pins varies from 0 to the internal 1.2V pull-
up voltage). External pull-up resistors or active-high output
stages can augment the pull-up current sources, up to a
voltage of 5V.
The ISL8101 accommodates three different DAC ranges:
.
Intel VRM9.0, AMD Hammer, or Intel VRM10.0. See
“Functional Pin Description” on page 5 for proper
connections for desired DAC range compatibility.
FIGURE 4. OVERCURRENT BEHAVIOR IN HICCUP MODE
TABLE 1. AMD HAMMER VOLTAGE IDENTIFICATION CODES
VID4
1
1
1
1
1
1
1
1
1
1
1
1
1
OUTPUT CURRENT
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
OUTPUT VOLTAGE
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
July 28, 2008
VDAC
0.800
0.825
0.850
0.875
0.900
0.925
0.950
0.975
1.000
1.025
1.050
1.075
FN9223.1
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