LTC3734EUH#TRPBF Linear Technology, LTC3734EUH#TRPBF Datasheet - Page 11
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LTC3734EUH#TRPBF
Manufacturer Part Number
LTC3734EUH#TRPBF
Description
IC CTRLR DC/DC 1PH HI EFF 32QFN
Manufacturer
Linear Technology
Datasheet
1.LTC3734EUH.pdf
(28 pages)
Specifications of LTC3734EUH#TRPBF
Applications
Controller, Intel Mobile CPU
Voltage - Input
4 ~ 30 V
Number Of Outputs
1
Voltage - Output
0.7 ~ 1.71 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
OPERATIO
Operational Amplifier and Deep Sleep Offset
The internal operational amplifier provides a program-
mable output offset at deep sleep state (when the
STP_CPUB signal is low). The offset percentage is pro-
grammed by the resistor from RDPSLP to V
resistor from output to V
slew rate of 5V/μs and is capable of driving capacitive
loads with an output RMS current typically up to 40mA.
The open-loop gain of the amplifier is >120dB and the
unity-gain bandwidth is 2MHz.
Output Overvoltage Protection
An overvoltage comparator, OV, guards against transient
overshoots (>10%) as well as other more serious condi-
tions that may overvoltage the output. In this case, the top
MOSFET is turned off and the bottom MOSFET is turned on
until the overvoltage condition is cleared.
Power Good
The PGOOD pin is connected to the drain of an internal
N-channel MOSFET. The MOSFET turns on when the
output voltage is not within ±10% of its nominal set point.
When the output voltage is within ±10% of its nominal set
point, the MOSFET turns off and PGOOD is high imped-
ance. PGOOD monitors the V
is not asserted. During VID, deep sleep or deeper sleep
U
(Refer to Functional Diagram)
OA
+
. The amplifier has an output
BOOT
voltage when MCH_PG
OA
+
and the
transitions, PGOOD is masked from going low for 110μs,
preventing the system from resetting during CPU mode
changes. When VID bits, STP_CPUB or DPRSLPVR sig-
nals change again after a previous transition, but before
the timer expires, the internal timer resets.
Short-Circuit Detection
The RUN/SS capacitor is used initially to limit the inrush
current from the input power source. Once the controller
has been given time, as determined by the capacitor on
the RUN/SS pin, to charge up the output capacitors and
provide full-load current, the RUN/SS capacitor is then
used as a short-circuit timeout circuit. If the output
voltage falls to less than 70% of its nominal output
voltage the RUN/SS capacitor begins discharging as-
suming that the output is in a severe overcurrent and/or
short-circuit condition. If the condition lasts for a long
enough period as determined by the size of the RUN/SS
capacitor, the controller will be shut down until the
RUN/SS pin voltage is recycled. This built-in latchoff can
be overidden by providing a current >5μA to the RUN/SS
pin. This current shortens the soft-start period but also
prevents net discharge of the RUN/SS capacitor during a
severe overcurrent and/or short-circuit condition. Fold-
back current limiting is activated when the output voltage
falls below 70% of its nominal level whether or not the
short-circuit latchoff circuit is enabled.
LTC3734
11
3734f