LTC3734EUH Linear Technology, LTC3734EUH Datasheet - Page 15

• Manufacturer Part Number: LTC3734EUH
• Description: IC CTRLR DC/DC 1PH HI EFF 32QFN
• Manufacturer: Linear Technology

Specifications of LTC3734EUH

• Applications: Controller, Intel Mobile CPU
• Voltage - Input: 4 ~ 30 V
• Number Of Outputs: 1
• Voltage - Output: 0.7 ~ 1.71 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the capacitor manufacturer if there is any
question.
The selection of C
series resistance (ESR). Typically once the ESR require-
ment has been met, the RMS current rating generally far
exceeds the I
output ripple (ΔV
Where f = operating frequency of each stage, C
output capacitance and ΔI
current.
The LTC3734 employs OPTI-LOOP technique to compen-
sate the switching regulator loop with external compo-
nents (through I
up regulator’s transient response, minimizes output
capacitance and effectively removes constraints on out-
put capacitor ESR. It opens a much wider selection of
output capacitor types and a variety of capacitor manufac-
tures are available for high current, low voltage switching
regulators.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance
through-hole capacitors. The OS-CON semiconductor
dielectric capacitor available from Sanyo has the lowest
(ESR)(size) product of any aluminum electrolytic at a
somewhat higher price. An additional ceramic capacitor
in parallel with OS-CON type capacitors is recommended
to reduce the inductance effects.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surface mount configurations. New special polymer (SP)
surface mount capacitors from Panasonic offer very low
ESR also but have much lower capacitive density per unit
Δ
V
OUT
≈
Δ
RIPPLE(P-P)
I ESR
L
TH
⎛
⎜
⎝
OUT
pin). OPTI-LOOP compensation speeds
OUT
U
) is determined by:
is driven by the required effective
+
requirements. The steady state
8
L
U
fC
is inductor peak-to-peak ripple
1
OUT
⎞
⎟
⎠
W
U
OUT
=
volume. In the case of tantalum, it is critical that the
capacitors are surge tested for use in switching power
supplies. Several excellent choices are the AVX TPS, AVX
TPSV or the KEMET T510 series of surface mount
tantalums, available in case heights ranging from 2mm to
4mm. Other capacitor types include Sanyo OS-CON,
POSCAPs, Kemet AO-CAPs , Nichicon PL series and
Sprague 595D series. Consult the manufacturer for other
specific recommendations. A combination of capacitors
will often result in maximizing performance and minimiz-
ing overall cost and size.
PV
The PV
therefore must be bypassed to power ground with a
minimum of 4.7μF ceramic or tantalum capacitor. Since
the gate driving currents are of high amplitude and high
slew rate, this bypassing capacitor should be placed very
close to the PV
inductance. Do NOT apply greater than 7V to the PV
The SV
circuitry of the LTC3734. This supply current is much
lower than that of the current for the external MOSFET
gate drive. Ceramic capacitors are very good for high
frequency filtering and a 0.1μF ~ 1μF ceramic capacitor
should be placed adjacent to the SV
Topside MOSFET Driver Supply (C
Functional Diagram)
External bootstrap capacitor C
pin supplies the gate drive voltages for the topside
MOSFETs. Capacitor C
charged though diode D
low. When the topside MOSFET turns on, the driver places
the C
MOSFET. This enhances the MOSFET and turns on the
topside switch. The switch node voltage, SW, rises to V
and the BOOST pin rises to V
boost capacitor C
total input capacitance of the topside MOSFET(s). The
reverse breakdown of D
CC
and SV
B
CC
CC
voltage across the gate-source of the desired
pin supplies power to the bottom gate driver and
pin supplies current to the internal control
CC
CC
Decoupling
and PGND pins to minimize the parasitic
B
needs to be 30 to 100 times that of the
B
B
B
must be greater than PV
from PV
in the Functional Diagram is
IN
B
connected to the BOOST
+ PV
CC
B
CC
,D
CC
when the SW pin is
B
. The value of the
and SGND pins.
) (Refer to
LTC3734
CC(MAX).
15
CC
pin.
3734f
IN