MAX17528GTJ+ Maxim Integrated Products, MAX17528GTJ+ Datasheet - Page 31

IC PWM CTRLR STP-DWN 32TQFN-EP

MAX17528GTJ+

Manufacturer Part Number
MAX17528GTJ+
Description
IC PWM CTRLR STP-DWN 32TQFN-EP
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17528GTJ+

Applications
Controller, Intel IMVP-6.5™ GMCH
Voltage - Input
4.5 ~ 5.5 V
Number Of Outputs
1
Voltage - Output
0.01 ~ 1.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 8. Pulse-Skipping/Discontinuous Crossover Point
In skip mode (SKIP = high), an inherent automatic
switchover to PFM takes place at light loads (Figure 8).
This switchover is affected by a comparator that truncates
the low-side switch on-time at the inductor current’s zero
crossing. The zero-crossing comparator senses the
inductor current across the low-side MOSFETs. Once
V
(see the Electrical Characteristics table), the comparator
forces DL low (Figure 3). This mechanism causes the
threshold between pulse-skipping PFM and nonskipping
PWM operation to coincide with the boundary between
continuous and discontinuous inductor-current opera-
tion. The PFM/PWM crossover occurs when the load-cur-
rent is equal to 1/2 the peak-to-peak ripple current,
which is a function of the inductor value (Figure 8). For a
battery input range of 7V to 20V, this threshold is relative-
ly constant, with only a minor dependence on the input
voltage due to the typically low duty cycles. The total
load current at the PFM/PWM crossover threshold
(I
The switching waveforms might appear noisy and asyn-
chronous when light loading activates pulse-skipping
operation, but this is a normal operating condition that
results in high light-load efficiency. Trade-offs between
PFM noise and light-load efficiency are made by
varying the inductor value. Generally, low inductor val-
ues produce a broader efficiency vs. load curve, while
higher values result in higher full-load efficiency
(assuming that the coil resistance remains fixed) and
less output voltage ripple. Penalties for using higher
LX
LOAD(SKIP)
drops below the zero-crossing comparator threshold
0
I
LOAD SKIP
∆i
∆t
ON-TIME
) is approximately:
=
V
(
BATT
Automatic Pulse-Skipping Switchover
L
- V
______________________________________________________________________________________
)
OUT
=
⎝ ⎜
t
SW OUT
V
L
TIME
⎠ ⎟
⎝ ⎜
V
IN
Intel IMVP-6.5/GMCH Controllers
V
IN
V
OUT
I
LOAD
I
PEAK
= I
⎠ ⎟
PEAK
/2
inductor values include larger physical size and
degraded load-transient response, especially at low
input-voltage levels.
The MAX17528 is enabled when SHDN is driven high
(Figures 9 and 10). The internal reference powers up
first, followed by the analog control circuitry. Roughly
50µs after the analog control circuitry powers up, the
PWM controller is enabled and begins the soft-start
sequence.
Power-on reset (POR) occurs when V
approximately 2V, resetting the fault latch and prepar-
ing the controller for operation. The V
inhibits switching until V
troller powers up the reference once the system
enables the controller, V
is driven high. The soft-start sequence ramps the out-
put voltage up to the target voltage—either the 1.1V
boot voltage for IMVP-6.5 (CLKEN pullup to 3.3V with
1.9kΩ) or the selected VID voltage for GMCH (CLKEN
= GND)—at 1/8 the nominal slew rate set by R
where dV
nominal slew rate. The soft-start circuitry does not use a
variable current limit, so full output current is available
immediately. The MAX17528 automatically uses pulse-
skipping mode during soft-start and uses forced-PWM
mode during soft-shutdown, regardless of the SKIP
configuration.
For IMVP-6.5 applications (CLKEN pullup to 3.3V with
1.9kΩ), the MAX17528 pulls CLKEN low approximately
60µs after reaching PGDIN is pulled high and the con-
troller reaches the 1.1V boot voltage. At the same time,
the MAX17528 slews the output to the selected VID
voltage at the programmed nominal slew rate. PWRGD
becomes high impedance approximately 5ms after
CLKEN is pulled low.
For GMCH applications (CLKEN = GND), PWRGD
becomes high impedance approximately 60µs after
reaching the selected VID voltage.
For automatic startup, the battery voltage should be
present before V
the controller attempts to bring the output into regula-
tion without the battery voltage present, the output
undervoltage fault latch disables the controller. The
MAX17528 remains shut down until the fault latch is
cleared by toggling SHDN or cycling the V
supply below 0.5V.
1-Phase Quick-PWM
TARGET
Power-Up Sequence (POR, UVLO)
t
TRAN START
/dt = 12.5mV/µs x 71.5kΩ/R
CC
(
rises above its UVLO threshold. If
CC
CC
)
=
rises above 4.25V. The con-
(
is above 4.25V, and SHDN
dV
8
TARGET
V
START
CC
/
CC
dt
UVLO circuitry
)
rises above
TIME
CC
TIME
power
is the
:
31

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