LNBH24LQTR STMicroelectronics, LNBH24LQTR Datasheet - Page 17
LNBH24LQTR
Manufacturer Part Number
LNBH24LQTR
Description
IC LNBS DUAL SUPPLY/CTRL 32-QFN
Manufacturer
STMicroelectronics
Datasheet
1.LNBH24LQTR.pdf
(25 pages)
Specifications of LNBH24LQTR
Applications
Converter, Analog and Digital Satellite STB Receivers/SatTV
Voltage - Input
8 ~ 15 V
Number Of Outputs
2
Voltage - Output
13.3V, 18.2V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10615-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LNBH24LQTR
Manufacturer:
ST
Quantity:
20 000
LNBH24L
Table 8.
Note:
7.5
7.6
7.7
TEST1
X
TEST2
X
Register
X = don’t care
Values are typical unless otherwise specified.
Power-ON I²C interface reset
The I²C interface built in the LNBH24L is automatically reset at power-on. As long as the
V
respond to any I²C command and the system registers (SR) are initialized to all zeroes, thus
keeping the power blocks disabled. Once the V
becomes operative and the SRs can be configured by the main microprocessor. This is due
to 500 mV of hysteresis provided in the UVL threshold to avoid false re-triggering of the
Power-ON reset circuit.
Address pins
For each section of the LNBH24L it is possible to select two I²C interface addresses by
means of the relevant ADDR pin. The ADDR pins are TTL compatible and can be set as per
hereafter address pins characteristics see
DiSEqC™ implementation for each section A/B
LNBH24L helps system designer to implement DiSEqC 1.x protocol by allowing an easy
PWK modulation of the 22 kHz carrier through the EXTM and V
the system to the specification is thus not implied by the bare use of the LNBH24L (see
DiSEqC 1.x operation descriptions and typical application circuits).
CC
stays below the undervoltage lockout (UVL) threshold (6.7 V), the interface will not
TEST3
X
exactly the same as
LLC
These bits are read
last write operation
they were left after
VSEL
EN
Doc ID 16857 Rev 2
OTF
0
1
OLF
Table 11
0
1
CC
T
T
I
I
These bits status must be disregarded by the
MCU.
O
O
J
J
rises above 7.3 V typ. The I²C interface
< I
> I
< 135°C, normal operation
> 150°C, power blocks disabled
.
OMAX
OMAX
, normal operation
, Overload Protection triggered
LNBH24 software description
oTX
Function
pins. Full compliance of
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