ISL6244CR Intersil, ISL6244CR Datasheet
ISL6244CR
Specifications of ISL6244CR
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ISL6244CR Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 321-724-7143 Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004 All Rights Reserved. Dynamic VID™ trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. ISL6244 FN9106.3 ...
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... IPC/JEDEC J STD-020. 2. Add “-T” suffix for 32 QFN 5x5 Tape and Reel packages. 2 ISL6244 Pinout PKG. DWG. # L32.5x5 L32.5x5 L32.5x5 32 L32.5x5 VID2 1 2 VID1 VID0 OFS COMP ISL6244CR (32 LEAD QFN 5x5) TOP VIEW PWM4 23 ISEN4 22 ISEN1 21 PWM1 20 PWM2 19 GND 18 ISEN2 17 ISEN3 10 11 ...
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Absolute Maximum Ratings Supply Voltage, VCC (Note .+7V Input, Output, or I/O Voltage ...
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Electrical Specifications Operating Conditions: VCC = 5V, T PARAMETER ERROR AMPLIFIER Open-Loop Gain Open-Loop Bandwidth Slew Rate Maximum Output Voltage Source Current Sink Current REMOTE-SENSE AMPLIFIER Input Impedance Bandwidth Slew Rate SENSE CURRENT IOUT Accuracy ISEN Offset Voltage Over-Current Trip ...
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Typical Operating Performance FIGURE 1. SOFT-START WAVEFORM FIGURE 3. INRUSH CURRENT AT VIN 10.8V @ 52A FIGURE 5. INDUCTOR CURRENT TRANSIENT 5 ISL6244 FIGURE 2. INRUSH CURRENT AT VIN 19V @ 52A FIGURE 4. TRANSIENT WAVEFORM FROM 0A TO 52A ...
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Typical Operating Performance 1.650 Vo+ (AMD SPEC) 1.600 1.550 1.500 Vo- (AMD SPEC) 1.450 1.400 0 20 OUTPUT CURRENT (A) FIGURE 7. ISL6244 DROOP: V 100 Vbat = 8.4 Vbat = 10.8 Vbat = 19 Vbat ...
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... Functional Pin Description ISL6244CR (32 LEAD QFN 5x5) TOP VIEW VID2 1 2 VID1 VID0 OFS 6 COMP CONNECT GND Bias and reference ground for the IC. VFF This pin is connected to VIN through a 10:1 voltage divider to allow for battery “feed-forward,” which improves stability over varying input line ...
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Typical Application: 3-Phase Buck Converter with r ISL6244 VCC VSEN RGND PWM4 VDIFF ISEN4 603 R FB 715 6800nF FB PWM1 C 12nF C IOUT R C ISEN1 2.43K COMP PWM2 OFS R ISEN2 OFS FS 2. PWM3 ...
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Theory of Operation Multi-Phase Power Conversion Microprocessor load current profiles have changed to the point where the multi-phase power conversion advantage is pronounced. The technical challenges associated with producing a single-phase converter which is both cost- VID4 VID3 DYNAMIC VID ...
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Interleaving The switching of each channel in a multi-phase converter is timed to be symmetrically out of phase with each of the other channels 3-phase converter, each channel switches 1/3 cycle after the previous channel and 1/3 cycle ...
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... Figure 16 illustrates Intersil’s patented current-balance method as implemented on channel multi-phase converter. (EQ. 3) sensing is not desired, an independent current- ...
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... The output of the error amplifier, V COMP sawtooth waveform to modulate the pulse width of the PWM signals. The PWM signals control the timing of the Intersil MOSFET drivers and regulate the converter output to the specified reference voltage. Three distinct inputs to the error amplifier determine the voltage level of V and external circuitry which control voltage regulation is illustrated in Figure 17 ...
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... DAC) plus offset errors in the OFS current source, remote- sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6244 to include all variations in current sources, amplifiers and the reference so that the output ...
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In most cases, each channel uses the same R sense current. A more complete expression for V derived by combining equations 15 and 16 OUT ------------ - ---------------------- R DROOP FB N ...
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... It is important that the driver ICs reach their POR level before the ISL6244 becomes enabled. The schematic in Figure 20 demonstrates sequencing the ISL6244 with the ISL620X family of Intersil MOSFET drivers which require 5V bias. The 11111 VID code is reserved as a signal to the controller that no load is present ...
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... The PWM outputs remain low until VDIFF falls to the programmed DAC level at which time they go into a high- impedance state. The Intersil drivers respond by turning off both upper and lower MOSFETs. If the over-voltage condition recurs, the ISL6244 will again command the lower MOSFETs to turn on ...
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... It is assumed that the reader is familiar with many of the basic skills and techniques referenced below. In addition to this guide, Intersil provides complete reference designs that include schematics, bills of materials, and example board layouts for all common microprocessor applications ...
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UPPER MOSFET POWER CALCULATION In addition to r losses, a large portion of the upper- DS(ON) MOSFET losses are due to currents conducted across the input voltage (V ) during switching. Since a substantially IN higher portion of the upper-MOSFET ...
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COMPENSATING LOAD-LINE REGULATED CONVERTER The load-line regulated converter behaves in a similar manner to a peak-current mode controller because the two poles at the output-filter L-C resonant frequency split with the introduction of current information into the control loop. The ...
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COMPENSATION WITHOUT LOAD-LINE REGULATION The non load-line regulated converter is accurately modeled as a voltage-mode regulator with two poles at the L-C resonant frequency and a zero at the ESR frequency. A type III controller, as shown in Figure 26, ...
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Since the capacitors are supplying a decreasing portion of the load current while the regulator recovers from the transient, the capacitor voltage becomes slightly depleted. The output inductors must be capable of assuming the entire load current before the output ...
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Figures 29 and 30 provide the same input RMS current information for three and four phase designs respectively. Use the same approach to selecting the bulk capacitor type and number as described above. 0 0.5 ...
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PHASE plane, is recommended. Stray Inductance in the switch path adds to the voltage spikes generated during the switching interval. By keeping the phase plane small, the magnitude ...
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V battery R OFS +5V OFS VFF PWM VCC C BP COMP C C ISL6244 VDIFF ISEN IOUT VSEN RGND GND ISLAND ON POWER PLANE LAYER KEY FIGURE 32. PRINTED CIRCUIT BOARD POWER PLANES AND ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...