ISL8120IRZ-T Intersil, ISL8120IRZ-T Datasheet - Page 15

IC CTRLR PWM 2/NPHASE 32-QFN

ISL8120IRZ-T

Manufacturer Part Number
ISL8120IRZ-T
Description
IC CTRLR PWM 2/NPHASE 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL8120IRZ-T

Pwm Type
Voltage Mode
Number Of Outputs
2
Frequency - Max
1.5MHz
Duty Cycle
90%
Voltage - Supply
3 V ~ 22 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Frequency-max
1.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL8120IRZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
ISL8120IRZ-T
0
Company:
Part Number:
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Quantity:
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Electrical Specifications
OSCILLATOR
Oscillator Frequency Range
Oscillator Frequency
Total Variation
Peak-to-Peak Ramp Amplitude
Linear Gain of Ramp Over V
Ramp Peak Voltage
Peak-to-Peak Ramp Amplitude
Peak-to-Peak Ramp Amplitude
Ramp Amplitude Upon Disable
Ramp Amplitude Upon Disable
Ramp DC Offset
FREQUENCY SYNCHRONIZATION AND PHASE LOCK LOOP
Synchronization Frequency
PLL Locking Time
Input Signal Duty Cycle Range (Note 3)
PWM
Minimum PWM OFF Time
Current Sampling Blanking Time (Note 3)
REFERENCE
Channel 1 Reference Voltage (Include
Error and Differential Amplifiers’ Offsets)
Channel 2 Reference Voltage (Include
Error and Differential Amplifiers’ Offsets)
ERROR AMPLIFIER
DC Gain (Note 3)
Unity Gain-Bandwidth (Note 3)
Input Common Mode Range (Note 3)
Output Voltage Swing
Slew Rate (Note 3)
Input Current (Note 3)
Output Sink Current
Output Source Current
Disable Threshold (Note 3)
DIFFERENTIAL AMPLIFIER
DC Gain (Note 3)
Unity Gain Bandwidth (Note 3)
Negative Input Source Current (Note 3)
Maximum Source Current for Current
Sharing (Typical Application VIII) (Note 3)
Input Impedance
Output Voltage Swing (Note 3)
Input Common Mode Range (Note 3)
PARAMETER
EN
15
Recommended Operating Conditions, Unless Otherwise Noted. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested. (Continued)
V
V
UGBW_EA
UGBW_DA
R
RAMP_PEAK
t
SYMBOL
t
BLANKING
ΔV
ΔV
ΔV
ΔV
ΔV
RAMP_OS
MIN_OFF
I
VSEN+_to
G
V
UG_DA
SR_EA
_VSEN-
I
V
V
I
I
VSEN1-
COMP
COMP
VSEN-
VSEN-
RAMP
REF1
REF2
I
RAMP
RAMP
RAMP
RAMP
RAMP
FB
VCC = 5V; -40°C < T
VCC = 5V, V
G
V
V
V
V
V
VCC = 5.4V (3V)
VCC = 5.4V (3V); F
R
R
VCC = 5V
R
Positive direction into the FB pin
Unity Gain Amplifier
VSEN1- Source Current for Current
Sharing when parallel multiple modules
each of which has its own voltage loop
ISL8120IRZEC
R
EN
EN
EN
EN
EN
RAMP
L
L
L
FS
= 10k, C
= 10k, C
= 10k, C
= VCC
= VCC = 5.4V, R
= VCC = 3V; R
= 0V; VCC = 3.5V to 5.5V
= 0V; VCC < 3.4V
= 100k, Figure 20
= ΔV
TEST CONDITIONS
L
L
L
EN
RAMP
= 100p, at COMP Pin
= 100p, at COMP Pin
= 100p, at COMP Pin
= 0.8V
/V
SW
UP
A
EN
UP
<+85°C
= 2k
= 400kHz;
= 2k
-0.75
0.85
MIN
-0.7
-0.2
-0.2
150
344
150
310
10
-9
0
VCC - 1.4
VCC - 2.4
VCC - 0.4
TYP
1.25
377
105
345
175
100
100
350
0.6
0.6
0.6
98
80
20
1
3
1
1
3
6
0
5
1
VCC - 1.8
VCC - 1.0
VCC - 1.8
VCC - 1.8
MAX
1500
1500
0.95
406
410
0.7
+9
90
April 21, 2009
FN6763.1
UNITS
V
V
V
V
V
MHz
V/µs
MHz
kHz
kHz
kHz
mA
mA
dB
nA
dB
nA
µA
µs
ns
ns
%
P-P
P-P
P-P
P-P
P-P
%
%
%
V
V
V
V
V
V
V
V
V

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