ISL9502CRZ Intersil, ISL9502CRZ Datasheet - Page 13

IC CTRLR PWM 2PHASE GPU 48-QFN

ISL9502CRZ

Manufacturer Part Number
ISL9502CRZ
Description
IC CTRLR PWM 2PHASE GPU 48-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL9502CRZ

Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
500kHz
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-10°C ~ 100°C
Package / Case
48-VQFN
Frequency-max
500kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Duty Cycle
-
Theory of Operation
The ISL9502 is a two-phase regulator including embedded
gate drivers for reduced system cost and board area. The
regulator provides optimum steady-state and transient
performance for GPU applications up to 60A. System
efficiency is enhanced by idling a phase at low-current and
implementing DCM-mode operation.
The heart of the ISL9502 is the patented R3 (Robust Ripple
Regulator®) modulator. The R3® modulator combines the
best features of fixed frequency PWM and hysteretic PWM
while eliminating many of their shortcomings. The ISL9502
modulator internally synthesizes an analog of the inductor
ripple current and uses hysteretic comparators on those
signals to establish PWM pulse widths. Operating on these
large-amplitude, noise-free synthesized signals allows the
ISL9502 to achieve lower output ripple and lower phase jitter
than either conventional hysteretic or fixed frequency PWM
controllers. Unlike conventional hysteretic converters, the
ISL9502 has an error amplifier that allows the controller to
maintain a 0.5% voltage regulation accuracy throughout the
VSEL range from 0.7V to 1.5V.
The hysteresis window voltage is relative to the error
amplifier output such that load current transients results in
increased switching frequency, which gives the R3 regulator
a faster response than conventional fixed frequency PWM
controllers. Transient load current is inherently shared
between active phases due to the use of a common
hysteretic window voltage. Individual average phase
voltages are monitored and controlled to equally share the
static current among the active phases.
Start-Up Timing
With the controller's +5V VDD voltage above the POR
threshold, the start-up sequence begins when VR_ON
exceeds the 3.3V logic HIGH threshold. Approximately
100µs later, SOFT and VOUT begin ramping to the boot
voltage of 1.2V. At startup, the regulator always operates in a
2-phase CCM mode, regardless of control signal assertion
levels. During this internal, the SOFT cap is charged by
40µA current source. If the SOFT capacitor is selected to be
20nF, the SOFT ramp will be at 2mV/s for a soft-start time of
600s. Approximately 7ms later, PGOOD is asserted HIGH.
The entire soft-start event is illustrated in Figure 21.
The ISL9502 is designed to always start up in 2-phase
mode, then switch to the desired state as dictated by the
states of the pins in Table 2. If a 1-phase design is
implemented, the second phase will try to switch during
start-up even though it is not connected to the system. This
will not affect the start-up performance. After soft-start is
complete, phase 2 will shut down and the controller will run
continuously in 1-phase mode.
13
ISL9502
Static Operation
After the start sequence, the output voltage will be regulated
to the value set by the VSEL inputs per Table 1. The
ISL9502 will control the no-load output voltage to an
accuracy of ±0.5% over the range of 0.75V to 1.5V. The
input of VSELs has to be actively pulled to logic high or logic
low. Floating VSEL pins will leave logic-level vulnerable to
noise-coupling.
A fully-differential amplifier implements core voltage sensing
for precise voltage control at the remote-sense point. The
inputs to the amplifier are the VSEN and RTN pins.
FIGURE 21. SOFT-START WAVEFORMS USING A 20nF SOFT
VSEL<5:0>
000000
000001
000010
000100
000101
001000
001001
001010
010000
010001
010010
010100
000011
000110
000111
001011
001100
001101
001110
010011
001111
V
VR_ON
SOFT & VO
DD
PGOOD
100µs
CAPACITOR
TABLE 1. VSEL TABLE
VOUT
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
2mV/µs
10mV/µs
VBOOT
6.8ms
VSEL<5:0>
010101
010110
011000
011001
011010
100000
100001
100010
100011
100100
100101
100110
101000
010111
011011
011100
011101
011110
100111
011111
VSEL COMMANDED
VOLTAGE
VOUT
0.975
0.950
0.925
0.900
0.875
0.850
0.825
0.800
0.775
0.750
0.725
0.700
0.675
0.650
0.625
0.600
0.575
0.550
0.525
0.500
July 17, 2006
FN9275.1

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