ADM1028ARQ ON Semiconductor, ADM1028ARQ Datasheet - Page 7

• Manufacturer Part Number: ADM1028ARQ
• Description: IC SENSOR TEMP/FAN CTRL 16QSOP
• Manufacturer: ON Semiconductor

Specifications of ADM1028ARQ

• Rohs Status: RoHS non-compliant
• Function: Fan Control, Temp Monitor
• Topology: ADC, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 100°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP

Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADM1028, write operations contain either one
or two bytes, and read operations contain one byte, and perform
the following functions:
To write data to one of the device data registers or read data
from it, the Address Pointer Register must be set so that the correct
data register is addressed, then data can be written into that
register or read from it. The first byte of a write operation always
contains an address that is stored in the Address Pointer Register.
If data is to be written to the device, the write operation contains
a second data byte that is written to the register selected by the
address pointer register.
REV. B
condition. In READ mode, the master device will override
the acknowledge bit by pulling the data line high during the
low period before the ninth clock pulse. This is known as
No Acknowledge. The master will then take the data line low
during the low period before the tenth clock pulse, then high
during the tenth clock pulse to assert a STOP condition.
Figure 2a. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
SDA
SDA
SCL
SCL
START BY
START BY
SDA
SCL
MASTER
MASTER
START BY
MASTER
1
0
1
0
1
0
1
1
1
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
0
0
0
1
1
FRAME 1
FRAME 1
1
FRAME 1
1
1
Figure 2b. Reading Data from the ADM1028
1
SDA (CONTINUED)
SCL (CONTINUED)
1
1
1
0
0
0
R/W
R/W
R/W
ADM1028
ADM1028
ACK. BY
ACK. BY
ADM1028
ACK. BY
9
9
D7
9
1
–7–
D7
D7
1
1
This is illustrated in Figure 2a. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the Address Pointer
Register. The second data byte is the data to be written to the
internal data register.
When reading data from a register there is only one possibility:
1. The serial bus address is written to the device along with the
D6
D7
1
address pointer register value. The ADM1028 should then
acknowledge the write by pulling SDA low during the ninth
clock pulse. The master does not generate a STOP condition
but issues a new START condition. The serial bus address
is again sent but with the R/W bit high, indicating a READ
operation. The ADM1028 will then return the data from the
selected register, and a No Acknowledge is generated to signify
the end of the read operation. The master will then initiate a
STOP condition to end the transaction and release the SMBus.
In Figures 2a and 2b, the serial bus address is shown as the
default value 0101110.
D6
D6
D6
D5
ADDRESS POINTER REGISTER BYTE
ADDRESS POINTER REGISTER BYTE
D5
D5
DATA BYTE FROM ADM1028
D5
D4
DATA BYTE
FRAME 3
D4
D4
D4
D3
FRAME 2
FRAME 2
FRAME 2
D3
D3
D2
D3
D2
D2
D2
D1
D1
D1
D1
D0
ADM1028
ACK. BY
D0
D0
D0
BY MASTER
9
ADM1028
ACK. BY
NO ACK.
ADM1028
ACK. BY
9
9
9
ADM1028
STOP BY
MASTER
STOP BY
MASTER